Power Minimization under QoS Constraints
| dc.contributor.author | Wong, Jennifer L. | |
| dc.contributor.author | Qu, Gang | |
| dc.contributor.author | Potkonjak, Miodrag | |
| dc.date.accessioned | 2009-05-11T16:09:52Z | |
| dc.date.available | 2009-05-11T16:09:52Z | |
| dc.date.issued | 2002-04 | |
| dc.description.abstract | QoS has been often addressed in multimedia, video, and networking research communities, but rarely in the design community. Our goal is to introduce the first system design technique for comprehensive quality-of-service (QoS) low power synthesis. Specifically, we study how to efficiently exploit the trade-o between the system cost and energy consumption in real-time systems that address packet-based multimedia transmission and processing. We first introduce a system of techniques that minimizes energy consumption of stream-oriented applications under two main QoS metrics: latency and synchronization. Speci cally, we study how multiple voltages can be used to simultaneously satisfy hardware requirements and minimize power consumption, while preserving the requested level of QoS, in this case satisfying latency and synchronization requirements. We have developed a provably optimal polynomial time o -line algorithm for multiple volt- age scheduling of single and multiple processes. The o -line algorithm provides lower bounds on achievable power minimization and can be used as a starting point for the development and evaluation of an on-line approach. The effectiveness of the algorithm is demonstrated on a number of multimedia benchmarks. | en |
| dc.format.extent | 242573 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.citation | J. Wong, G. Qu, and M. Potkonjak. "Power Minimization under QoS Constraint," IEEE International Packetvideo Workshop, April 2002. | en |
| dc.identifier.uri | http://hdl.handle.net/1903/9072 | |
| dc.language.iso | en_US | en |
| dc.publisher | IEEE | en |
| dc.relation.isAvailableAt | A. James Clark School of Engineering | en_us |
| dc.relation.isAvailableAt | Electrical & Computer Engineering | en_us |
| dc.relation.isAvailableAt | Digital Repository at the University of Maryland | en_us |
| dc.relation.isAvailableAt | University of Maryland (College Park, MD) | en_us |
| dc.rights.license | Copyright © 2002 IEEE. Reprinted from IEEE International Packetvideo Workshop. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Maryland's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it. | |
| dc.subject | QoS | en |
| dc.subject | system design | en |
| dc.subject | synchonization | en |
| dc.subject | latency | en |
| dc.title | Power Minimization under QoS Constraints | en |
| dc.type | Other | en |
Files
Original bundle
1 - 1 of 1