Mechanical Engineering Theses and Dissertations
Permanent URI for this collectionhttp://hdl.handle.net/1903/2795
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Item Utilization of Data and Models for Commercial off-the Shelf (COTS) Electronic Component Selection and Reliability Assessment(2018) Elburn, Edmond; Pecht, Michael; Das, Diganta; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)The continued growth of commercial off-the-shelf (COTS) parts in electronic systems and hesitance of use in some applications necessitates the development of methods to evaluate part reliability. An information-based reliability evaluation method has been developed based on failure mechanism models incorporating application conditions and part parameters. The sources of the information necessary for COTS parts were identified along with the information these sources provide. The sources were contrasted with the information required for military, space, or automotive grade parts. Multiple methods of approximating the application conditions and part parameters were developed and incorporated into the reliability methodology along with the impacts of uncertainty levels on the reliability prediction. An evaluation of information availability was completed, and metrics were developed to quantify the thermal and material information provided for parts. An analysis of 22 COTS parts evaluated the metrics’ effectiveness, and reliability estimations compared the changes in part parameters and conditions.Item INFLUENCE OF GAS FLOW RATES ON TRACE QUALITY AND RELIABILITY IN A SELECTED CONDUCTOR INK PRINTED WITH AN AEROSOL JET PRINTER(2018) Dalal, Neil; Dasgupta, Abhijit; Das, Siddhartha; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Preliminary comparisons conducted between two aerosol jet printed samples, an interconnect-over-fillet specimen and baseline test coupons, revealed strong differences in surface agglomeration characteristics. These differences were subsequently found to be strongly correlated with differences in thermal cycling durability. One potential cause could be the differences in the carrier and sheath gas flow rates at which the nanoparticle ink was deposited onto the substrate during the AJP process. A parametric study was conducted to explore any relationship between gas flow rates and print quality. Serpentine test structures were aerosol jet printed at parametrically varied carrier and sheath gas flow rates. For each serpentine, its macroscale and micromorphological features were assessed as quality metrics and investigated for a potential relationship with gas flow rates. Future studies will subject these printed serpentine test structures of varying quality to thermal cycling to establish possible correlations between gas flow rate and thermal cycling durability.Item ADVANCED STATISTICAL ANALYSIS FOR TAIL-END PROBABILITY PREDICTION AND PERFORMANCE RESPONSE CALCULATION OF SEMICONDUCTOR PACKAGING PRODUCTS WITH A LARGE NUMBER OF INPUT VARIABLES(2018) Wei, Hsiu-Ping; Han, Bongtae; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Stochastic reliability modeling capabilities are developed and implemented for semiconductor packaging problems with a very large number of input variables (> 10 input variables). The capabilities are aimed at three critical areas in the semiconductor packaging product development: (1) prediction of tail-end probability (i.e., assembly yield loss) by advanced uncertainty propagation (UP) analyses, (2) determination of the statistical distributions of unknown design and/or manufacturing parameters by advanced statistical model calibrations, and (3) determination of the performance response of high-dimensional problems by developing an advanced metamodeling scheme. In the first part, a comprehensive stochastic model is proposed and implemented to predict package-on-package (PoP) stacking yield loss based on non-contact open. The model takes into account all pad locations at the stacking interface while considering the statistical variations of warpages as well as solder ball and joint heights. The goal is achieved by employing (1) advanced approximate integration-based approach, called eigenvector dimension reduction (EDR) method, for the UP analysis; (2) the stress-strength interference (SSI), and (3) the union of events. The proposed approach is capable of handling the number of input variables much larger than that has been conceived as the practical limit of the UP analysis. The model can be used effectively to control the input uncertainties, and thus to achieve a yield goal for a given set of PoP designs. In the second part, the unknown statistical distributions of two effective elastic properties of Sn-3.0Ag-0.5Cu solder joint of leadless chip resistors (LCRs), induced by an assembly condition, are determined by the advanced statistical model calibration. The UP analysis also utilizes the EDR method, which allows to take into account the statistical variations of six additional known input variables, including die thickness, solder joint height, termination length, and thickness and elastic moduli of a printed circuit board. The cyclic bending test results of LCR assemblies are used in conjunction with the maximum likelihood metric to obtain the statistical distributions of the effective properties. The cycles-to-failure distribution of the identical LCR assemblies subjected to a different loading level is predicted accurately by the calibrated model, which corroborates the validity of the proposed approach. In the third part, an advanced metamodeling scheme, called partitioned bivariate Cut-high dimensional model representation (PB Cut-HDMR), is developed to consider the statistical correlation among input variables and to further reduce the computational burden encountered for high-dimensional problems without compromising accuracy. The statistical correlation is handled by eigen-decomposition of a covariance matrix. The latter is achieved by the HDMR-factorial design (HDMR-FD) hybrid method. The validity of the proposed scheme is verified by comparing the performance of the proposed scheme with the full bivariate Cut-HDMR. The proposed scheme is implemented successfully to construct an accurate metamodel for a problem with 12 input variables among which 2 pairs are correlated.Item EFFECT OF LONG-TERM AGING ON LEAD-FREE SOLDER AND SURFACE FINISH(2017) Pandian, Guru Prasad; Pecht, Michael G; Das, Diganta; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Since 2006, commercial electronics manufacturers have been banned from using lead-based materials and other toxic materials in their products due to the RoHS directive from the European Union. This led to industries transitioning to lead-free materials to be used in solder and surface finishes of their products. Although all of commercial electronics industry has transitioned to lead-free materials, some of the reliability and safety critical products used in industries such as defense, aerospace, automobile, and healthcare sectors are still exempted from the lead-free regulation. These industries are hesitant to transition to lead-free due to lack of data and hence the confidence on the long-term reliability of lead-free electronics. Known issues of tin whiskers and solder interconnect fatigue which can arise later in a products life have raised concerns related to the use of lead-free materials in electronic assemblies. To address these concerns, 10 year old lead-free systems were examined to determine the solder interconnect degradation level and tin whisker risk level.Item Reliability of Copper-Filled Stacked Microvias in High Density Interconnect Circuit Boards(2017) Ning, Yan; Pecht, Michael; Azarian, Michael H; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)The electronics industry strives to produce affordable, lightweight, and reliable products with higher performance. At the electronic component level, this translates to components with increased I/Os and reduced footprints, and on the package substrate and printed circuit board (PCB) level, to the use of high density interconnects (HDIs). HDI technology makes use of microvias as interconnects between different conductor layers. According to IPC standards, microvias are blind or buried vias that are equal to or less than 150 μm in diameter. Advances in miniaturized electronic devices have led to the evolution of microvias from single-level to stacked structures that intersect multiple HDI layers. A stacked microvia is usually filled with electroplated copper to make electrical interconnections and provide structural support. A challenge for HDI circuit board processing is to fabricate microvias without generating defects in the deposited copper structures. Firstly, the copper plating process can easily generate voids in microvias. When voids are present, localized stress concentrations within the electrodeposited copper structure can degrade the reliability of microvias. Secondly, poor quality of electroless copper (a process step following microvia hole drilling and prior to electrolytic copper plating, that makes the microvia hole conductive) results in inferior bonding between the base of the microvia and the target pad underneath the microvia. Microvia base and target pad interface separation is a common failure observed in HDI circuit boards. The objectives of this dissertation are to determine the effects of voids on the lifetime of copper-filled stacked microvias, and to develop an analytical model that the electronics industry can use to predict microvia fatigue life and assess risks associated with production and use of the latest generation of HDI circuit boards. The dissertation also aims to quantitatively address the factors that affect microvia interface separation. A parametric study was conducted to investigate the effects of voids on the thermo-mechanical reliability of copper-filled stacked microvias using 3-D finite element analysis and strain-based fatigue life estimation. It was found that microvia fatigue life is affected by geometrical void characteristics, such as shape, size, and location; microvia aspect ratio; and material properties of dielectric layers. Large voids decrease the lifetime of microvias—for example, a 16% conical void results in a microvia fatigue life that is only 1.4% of that of a non-voided microvia. Moreover, microvia aspect ratio and z-axis coefficient of thermal expansion (CTE) of the HDI dielectric material are critical parameters for the lifetime. The fatigue life of a voided microvia of 0.25 aspect ratio is more than two orders of magnitude longer than the fatigue life of a voided microvia of 0.75 aspect ratio with the same void size. An increase of the z-axis CTE by 40% (from 50 ppm/°C to 70 ppm/°C) decreases the microvia fatigue life by 95%. As an outgrowth of this study, a microvia virtual qualification method was proposed. Using the combination of finite element analysis and fatigue life estimation, the required amount of HDI board reliability testing will be reduced, cutting overall development time and cost. The factors that affect microvia fatigue life were examined, and a design of experiment (finite element simulation) was performed to quantify the effects of those factors on microvia lifetime in terms of cycles to failure. A second-order regression life prediction model was developed using response surface mothed (RSM) to predict cycles to failure of copper-filled stacked microvias under thermal loading. The life prediction model accounts for not only the microvia design parameters and material properties, but also voiding defects introduced during the manufacturing process. The model can predict cycles-to-failure of microvias without voids and with voids of different sizes. The electronics industry can use this model as a convenient and inexpensive tool for HDI design and process validation. This is the first known regression model for copper-filled stacked microvia life prediction. Finally, the factors that affect microvia interface separation were quantitatively addressed. Finite element modeling was used to simulate microvias with imperfect electroless copper layers. This study revealed how thermal loadings and structure flaws (in terms of initial crack length) affect the chance of microvia interface separation.Item Failure Modes and Mechanisms Analysis of Silicon Power Devices(2017) Valentine, Nathan Allen; Pecht, Michael G; Das, Diganta; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Silicon power devices are a major reliability concern for power electronics converters. Failure modes, mechanisms, and effects (FMMEA) is a well-established method for identifying and analyzing the critical failure mechanisms and improving the reliability of a system through the process. The effects of the various failure mechanisms (and modes) are system dependent and cannot be identified in isolation. This work establishes a Failure Modes and Mechanisms Analysis (FMMA) for silicon power devices that identifies the relevant failure modes and mechanisms for those components. Following the FMMA, a set of failure analysis case studies of silicon power devices which aid in the identification of failure causes and mechanisms for the FMMA are described. Finally, the criticality of the different mechanisms is discussed based on the severity of a failure within a given system, the occurrence of a failure mechanism for a given component, and the ability to detect a failure using techniques such as PHM, criticality can be identified for the mechanisms.Item The Effectiveness of Warranties in the Solar Photovoltaic and Automotive Industries(2017) Formica, Tyler James; Pecht, Michael G; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)A warranty is an agreement outlined by a manufacturer to a customer that defines performance requirements for a product or service. Although long warranty periods are a useful marketing tool, in 2011 the warranty claims expense was 2.6% of total sales for computer original equipment manufacturers (OEMs) and is over 2% of total sales in many other industries today. Solar PV systems offer inverters with 5-15 year warranties and PV modules with 25-year performance warranties. This is problematic for the return on investment (ROI) of solar PV systems when the modules are still productive and covered under warranty but inverter failures occur due to degradation of electronic components after their warranty has expired. Out-of-warranty inverter failures during the lifetime of solar panels decrease the ROI of solar PV systems significantly and can cause the annual ROI to actually be negative 15-25 years into the lifetime of the system. This thesis analyzes the factors that contribute to designing an optimal warranty period and the relationship between reliability and warranty periods using General Motors (GM) and the solar PV industry as case studies. A return on investment of a solar photovoltaic system is also conducted and the effect of reliability, changing tax credit structures, and failure areas of solar PV systems are analyzed.Item The Effect of Package Geometry on Moisture Driven Degradation of Polymer Aluminum Capacitors(2016) Bevensee, Helmut Manfred; Azarian, Michael H.; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Polymer aluminum electrolytic capacitors were introduced to provide an alternative to liquid electrolytic capacitors. Polymer electrolytic capacitor electric parameters of capacitance and ESR are less temperature dependent than those of liquid aluminum electrolytic capacitors. Furthermore, the electrical conductivity of the polymer used in these capacitors (poly-3,4ethylenedioxithiophene) is orders of magnitude higher than the electrolytes used in liquid aluminum electrolytic capacitors, resulting in capacitors with much lower equivalent series resistance which are suitable for use in high ripple-current applications. The presence of the moisture-sensitive polymer PEDOT introduces concerns on the reliability of polymer aluminum capacitors in high humidity conditions. Highly accelerated stress testing (or HAST) (110ºC, 85% relative humidity) of polymer aluminum capacitors in which the parts were subjected to unbiased HAST conditions for 700 hours was done to understand the design factors that contribute to the susceptibility to degradation of a polymer aluminum electrolytic capacitor exposed to HAST conditions. A large scale study involving capacitors of different electrical ratings (2.5V – 16V, 100µF – 470 µF), mounting types (surface-mount and through-hole) and manufacturers (6 different manufacturers) was done to determine a relationship between package geometry and reliability in high temperature-humidity conditions. A Geometry-Based HAST test in which the part selection limited variations between capacitor samples to geometric differences only was done to analyze the effect of package geometry on humidity-driven degradation more closely. Raman spectroscopy, x-ray imaging, environmental scanning electron microscopy, and destructive analysis of the capacitors after HAST exposure was done to determine the failure mechanisms of polymer aluminum capacitors under high temperature-humidity conditions.Item Multi-Scale Dynamic Study of Secondary Impact During Drop Testing of Surface Mount Packages(2016) Meng, Jingshi; Dasgupta, Abhijit; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)This dissertation focuses on design challenges caused by secondary impacts to printed wiring assemblies (PWAs) within hand-held electronics due to accidental drop or impact loading. The continuing increase of functionality, miniaturization and affordability has resulted in a decrease in the size and weight of handheld electronic products. As a result, PWAs have become thinner and the clearances between surrounding structures have decreased. The resulting increase in flexibility of the PWAs in combination with the reduced clearances requires new design rules to minimize and survive possible internal collisions impacts between PWAs and surrounding structures. Such collisions are being termed ‘secondary impact’ in this study. The effect of secondary impact on board-level drop reliability of printed wiring boards (PWBs) assembled with MEMS microphone components, is investigated using a combination of testing, response and stress analysis, and damage modeling. The response analysis is conducted using a combination of numerical finite element modeling and simplified analytic models for additional parametric sensitivity studies.Item COPPER CORROSION IN THE FLOWERS OF SULFER TEST ENVIRONMENT(2015) Mahadeo, Dinesh Michael; Pecht, Michael G; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Sulfur, present in the environment in the form of sulfur dioxide and hydrogen sulfide, can produce failure in electronics. In particular, copper, which is used extensively in electronic products, is subject to corrosion in the presence of sulfur. This thesis examines the corrosion of copper under the Flowers of Sulfur (FoS) test at varying temperatures and durations. The FoS test setup, described in ASTM B809, was initially designed to evaluate surface finish porosity, but this setup may have boarder application. To expand the applicability of the FoS test, it is important to characterize the test environment. To this end, a systematic study of copper corrosion was conducted through weight gain measurements of copper coupons that were subjected to FoS test environments. From the test results, a model was developed that correlates copper sulfide thickness to temperature and time under the FoS test. This model can be used to determine test conditions given a target field environment.