Hardware/Software Architectures for Real-Time Caching

dc.contributor.authorJacob, Bruce
dc.date.accessioned2007-10-25T18:40:23Z
dc.date.available2007-10-25T18:40:23Z
dc.date.issued1999-10
dc.description.abstractThere are two fundamental problems in guaranteeing cache performance for real-time embedded systems: conflict and capacity misses. Though fully associative caches would solve conflict misses, they are too expensive to implement in embedded systems. There are two alternatives: a real-time cache (a software managed fully associative cache with extremely large cache blocks) and a virtually addressed cache. To address capacity misses, one can dynamically (and predictably) manage the cache contents.en
dc.format.extent31814 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.citation"Hardware/software architectures for real-time caching." Bruce L Jacob. Proc. Second Workshop on Compiler and Architecture Support for Embedded Systems (CASES'99), pp. 135-138, Washington DC, October 1999.en
dc.identifier.urihttp://hdl.handle.net/1903/7440
dc.language.isoen_USen
dc.relation.isAvailableAtA. James Clark School of Engineeringen_us
dc.relation.isAvailableAtElectrical & Computer Engineeringen_us
dc.relation.isAvailableAtDigital Repository at the University of Marylanden_us
dc.relation.isAvailableAtUniversity of Maryland (College Park, MD)en_us
dc.subjectreal-time embedded systemsen
dc.subjectconflict and capacity missesen
dc.subjectcache performanceen
dc.titleHardware/Software Architectures for Real-Time Cachingen
dc.typePresentationen

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