Hardware/Software Architectures for Real-Time Caching
dc.contributor.author | Jacob, Bruce | |
dc.date.accessioned | 2007-10-25T18:40:23Z | |
dc.date.available | 2007-10-25T18:40:23Z | |
dc.date.issued | 1999-10 | |
dc.description.abstract | There are two fundamental problems in guaranteeing cache performance for real-time embedded systems: conflict and capacity misses. Though fully associative caches would solve conflict misses, they are too expensive to implement in embedded systems. There are two alternatives: a real-time cache (a software managed fully associative cache with extremely large cache blocks) and a virtually addressed cache. To address capacity misses, one can dynamically (and predictably) manage the cache contents. | en |
dc.format.extent | 31814 bytes | |
dc.format.mimetype | application/pdf | |
dc.identifier.citation | "Hardware/software architectures for real-time caching." Bruce L Jacob. Proc. Second Workshop on Compiler and Architecture Support for Embedded Systems (CASES'99), pp. 135-138, Washington DC, October 1999. | en |
dc.identifier.uri | http://hdl.handle.net/1903/7440 | |
dc.language.iso | en_US | en |
dc.relation.isAvailableAt | A. James Clark School of Engineering | en_us |
dc.relation.isAvailableAt | Electrical & Computer Engineering | en_us |
dc.relation.isAvailableAt | Digital Repository at the University of Maryland | en_us |
dc.relation.isAvailableAt | University of Maryland (College Park, MD) | en_us |
dc.subject | real-time embedded systems | en |
dc.subject | conflict and capacity misses | en |
dc.subject | cache performance | en |
dc.title | Hardware/Software Architectures for Real-Time Caching | en |
dc.type | Presentation | en |
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