Two Transistor Synapse with Spike Timing Dependent Plasticity
dc.contributor.author | Haas, Alfred | |
dc.contributor.author | Datta, Timir | |
dc.contributor.author | Abshire, Pamela | |
dc.contributor.author | Peckerar, Martin | |
dc.date.accessioned | 2008-10-21T13:33:10Z | |
dc.date.available | 2008-10-21T13:33:10Z | |
dc.date.issued | 2009 | |
dc.description.abstract | We present a novel two transistor synapse (“2TS”) that exhibits spike timing dependent plasticity (“STDP”). Temporal coincidence of synthetic pre- and post- synaptic action potentials across the 2TS induces localized floating gate injection and tunneling that result in proportional Hebbian synaptic weight updates. In the absence of correlated pre- and postsynaptic activity, no significant weight updates occur. A compact implementation of the 2TS has been designed, simulated, and fabricated in a commercial 0.5 μm process. Suitable synthetic neural waveforms for symmetric STDP have been derived and circuit and network operation have been modeled and tested. Simulations agree with theory and preliminary experimental results. | en |
dc.format.extent | 1232320 bytes | |
dc.format.mimetype | application/pdf | |
dc.identifier.uri | http://hdl.handle.net/1903/8650 | |
dc.language.iso | en_US | en |
dc.relation.isAvailableAt | A. James Clark School of Engineering | en_us |
dc.relation.isAvailableAt | Electrical & Computer Engineering | en_us |
dc.relation.isAvailableAt | Digital Repository at the University of Maryland | en_us |
dc.relation.isAvailableAt | University of Maryland (College Park, MD) | en_us |
dc.subject | synapse, spike timing dependent plasticity, stdp, neuron, analog VLSI, neuromorphic design | en |
dc.title | Two Transistor Synapse with Spike Timing Dependent Plasticity | en |
dc.type | Preprint | en |
Files
Original bundle
1 - 1 of 1