Two Transistor Synapse with Spike Timing Dependent Plasticity

dc.contributor.authorHaas, Alfred
dc.contributor.authorDatta, Timir
dc.contributor.authorAbshire, Pamela
dc.contributor.authorPeckerar, Martin
dc.date.accessioned2008-10-21T13:33:10Z
dc.date.available2008-10-21T13:33:10Z
dc.date.issued2009
dc.description.abstractWe present a novel two transistor synapse (“2TS”) that exhibits spike timing dependent plasticity (“STDP”). Temporal coincidence of synthetic pre- and post- synaptic action potentials across the 2TS induces localized floating gate injection and tunneling that result in proportional Hebbian synaptic weight updates. In the absence of correlated pre- and postsynaptic activity, no significant weight updates occur. A compact implementation of the 2TS has been designed, simulated, and fabricated in a commercial 0.5 μm process. Suitable synthetic neural waveforms for symmetric STDP have been derived and circuit and network operation have been modeled and tested. Simulations agree with theory and preliminary experimental results.en
dc.format.extent1232320 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/1903/8650
dc.language.isoen_USen
dc.relation.isAvailableAtA. James Clark School of Engineeringen_us
dc.relation.isAvailableAtElectrical & Computer Engineeringen_us
dc.relation.isAvailableAtDigital Repository at the University of Marylanden_us
dc.relation.isAvailableAtUniversity of Maryland (College Park, MD)en_us
dc.subjectsynapse, spike timing dependent plasticity, stdp, neuron, analog VLSI, neuromorphic designen
dc.titleTwo Transistor Synapse with Spike Timing Dependent Plasticityen
dc.typePreprinten

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