Power Minimization in QoS Sensitive Systems

dc.contributor.authorWong, Jennifer L
dc.contributor.authorQu, Gang
dc.contributor.authorPotkonjak, Miodrag
dc.date.accessioned2009-03-12T12:43:45Z
dc.date.available2009-03-12T12:43:45Z
dc.date.issued2004-06
dc.description.abstractThe majority of modern multimedia and mobile systems have two common denominators: quality-of-service (QoS) requirements, such as latency and synchronization, and strict energy constraints. However, until now no synthesis techniques have been proposed for the design and efficient use of such systems.We have two main objectives: conceptual and synthesis. The conceptual objective is to develop a generic practical technique for the automatic development of online adaptive algorithms from efficient off-line algorithms using statistical techniques. The synthesis objective is to introduce the first design technique for QoS low-power synthesis. We introduce a system of provablyoptimal techniques that minimize energy consumption of streamoriented applications under two main QoS metrics: latency and synchronization. Specifically, we study how multiple voltages can be used to simultaneously satisfy hardware constraints and minimize power consumption while preserving the requested level of QoS. The purpose of the off-line algorithm is threefold. First, it is used as input to statistical software which is used to identify important and relevant parameters of the processes. Second, the algorithm provides buffer occupancy rate indicators. Lastly, it provides a way to combine buffer occupancy and QoS metrics to form a fast and efficient online algorithm. The effectiveness of the algorithms is demonstrated on a number of standard multimedia benchmarks.en
dc.format.extent403702 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.citationJ.L. Wong, G. Qu, and M. Potkonjak. "Power Minimization in QoS Sensitive Systems," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 12, No. 6, pp. 553-561, June 2004.en
dc.identifier.urihttp://hdl.handle.net/1903/8957
dc.language.isoen_USen
dc.publisherIEEEen
dc.relation.isAvailableAtA. James Clark School of Engineeringen_us
dc.relation.isAvailableAtElectrical & Computer Engineeringen_us
dc.relation.isAvailableAtDigital Repository at the University of Marylanden_us
dc.relation.isAvailableAtUniversity of Maryland (College Park, MD)en_us
dc.rights.licenseCopyright © 2004 IEEE. Reprinted from IEEE Transactions on Very Large Scale Integration (VLSI) Systems. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Maryland's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.
dc.subjectLow poweren
dc.subjectquality of service (QoS)en
dc.subjectsynchronizationen
dc.titlePower Minimization in QoS Sensitive Systemsen
dc.typeArticleen

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