CASPER: An Integrated Energy-Driven Approach for Task Graph Scheduling on Distributed Embedded Systems
CASPER: An Integrated Energy-Driven Approach for Task Graph Scheduling on Distributed Embedded Systems
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Date
2005-07
Authors
Kianzad, Vida
Bhattacharyya, Shuvra S.
Qu, Gang
Advisor
Citation
V. Kianzad, S.S. Bhattacharyya, and G. Qu. "CASPER: An Integrated Energy-Driven Approach for Task Graph Scheduling on Distributed Embedded Systems," 16th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP'05), July 2005.
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Abstract
For multiprocessor embedded systems, the dynamic voltage
scaling (DVS) technique can be applied to scheduled
applications for energy reduction. DVS utilizes slack in the
schedule to slow down processes and save energy. Therefore,
it is generally believed that the maximal energy saving
is achieved on a schedule with the minimum makespan
(maximal slack). Most current approaches treat task assignment,
scheduling, and DVS separately. In this paper,
we present a framework called CASPER (Combined Assignment,
Scheduling, and PowER-management) that challenges
this common belief by integrating task scheduling
and DVS under a single iterative optimization loop via genetic
algorithm. We have conducted extensive experiments
to validate the energy efficiency of CASPER. For homogeneous
multiprocessor systems (in which all processors are
of the same type), we consider a recently proposed slack distribution
algorithm (PDP-SPM) [3]: applying PDP-SPM
on the schedule with the minimal makespan gives an average
of 53.8% energy saving; CASPER finds schedules with
slightly larger makespan but a 57.3% energy saving, a 7.8%
improvement. For heterogeneous systems, we consider the
power variation DVS (PV-DVS) algorithm [13], CASPER
improves its energy efficiency by 8.2%. Finally, our results
also show that the proposed single loop CASPER framework
saves 23.3% more energy over GMA+EE-GLSA [12],
the only other known integrated approach with a nested
loop that combines scheduling and power management in
the inner loop but leaves assignment in the outer loop.