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Quality of Service and System Design

dc.contributor.authorKornegay, Kevin T.
dc.contributor.authorQu, Gang
dc.contributor.authorPotkonjak, Miodrag
dc.identifier.citationK.T. Kornegay, G. Qu , and M. Potkonjak. "Quality of Service and System Design," (Invited paper) IEEE Computer Society Annual Workshop on VLSI, Theme: System Level Design, pp. 112-117, April 1999.en
dc.description.abstractQuality of Service (QoS) of the implementation of an application can be defined as a function of the properties of the application and its implementation as observed by the user and/or the environment. Typical application and implementation properties include latency, throughput, jitter, and the level of resolution. Many of the current and pending most popular applications, such as multimedia, wireless sensing and communications, security and PEBBs, have intrinsic relevant QoS components. Recently, quality of service attracted a great of deal of attention in a number of research and development communities, and in particular, in the network and multimedia literature. However, until now synthesis and CAD research did not addressed how to design systems with quantitative QoS requirements. Our goal in this paper is to outline foundations and framework in which QoS system design trade-offs and optimization can be addressed. We first identify and state in synthesis-usable way two currently most popular approaches to Quality of Service treatment: Q-RAM and DScurve (demand/service). We discuss advantages and limitations of the two approaches. Next, we show how these two approaches can be combined in a new more comprehensive QoS framework. We also explain and illustrate using examples interaction between QoS and synthesis and compilation tasks. We conclude by identifying and discussing the future directions related to synthesis of QoS-sensitive systems.en
dc.format.extent104637 bytes
dc.subjectquality of serviceen
dc.subjectsystem designen
dc.titleQuality of Service and System Designen
dc.relation.isAvailableAtA. James Clark School of Engineeringen_us
dc.relation.isAvailableAtElectrical & Computer Engineeringen_us
dc.relation.isAvailableAtDigital Repository at the University of Marylanden_us
dc.relation.isAvailableAtUniversity of Maryland (College Park, MD)en_us
dc.rights.licenseCopyright © 1999 IEEE. Reprinted from IEEE Computer Society Annual Workshop on VLSI. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Maryland's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to By choosing to view this document, you agree to all provisions of the copyright laws protecting it.

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