Techniques for Energy-Efficient Communication Pipeline Design

View/ Open
Date
2002-10Author
Qu, Gang
Potkonjak, Miodrag
Citation
G. Qu and M. Potkonjak. "Techniques for Energy-Efficient Communication Pipeline Design," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 10, No. 5, pp. 542-549, October 2002.
Metadata
Show full item recordAbstract
The performance of many modern computer and
communication systems is dictated by the latency of communication
pipelines. At the same time, power/energy consumption
is often another limiting factor in many portable systems. We
address the problem of how to minimize the power consumption
in system-level pipelines under latency constraints. In particular,
we apply fragmentation technique to achieve parallelism and
exploit advantages provided by variable voltage design methodology
to optimally select voltage and, therefore, speed of each
pipeline stage.We focus our study on the practical case when each
pipeline stage operates at a fixed speed. Unlike the conventional
pipeline system, where all stages run at the same speed, our
system may have different stages running at different speeds to
conserve energy while providing guaranteed latency. For a given
latency requirement, we find explicit solutions for the most energy
efficient fragmentation and voltage setting. We further study a
less practical case when each stage can dynamically change its
speed to get further energy saving. We define the problem and
transform it to a nonlinear system whose solution provides a lower
bound for energy consumption. We apply the obtained theoretical
results to develop algorithms for power/energy minimization of
computer and communication systems. The experimental result
suggests that significant power/energy reduction, is possible
without additional latency. In fact, we achieve almost 40% total
energy saving over the combined minimal supply voltage selection
and system shut-down technique and 85% if none of these two
energy minimization methods is used.