Extended Split-Issue: Enabling Flexibility in the Hardware Implementation of NUAL VLIW DSPs
Extended Split-Issue: Enabling Flexibility in the Hardware Implementation of NUAL VLIW DSPs
Files
Publication or External Link
Date
2004-06
Authors
Iyer, Bharath
Srinivasan, Sadagopan
Jacob, Bruce
Advisor
Citation
"Extended Split-Issue: Enabling flexibility in the hardware implementation of NUAL VLIW DSPs." Bharath Iyer, Sadagopan Srinivasan, and Bruce Jacob. Proc. 31st International Symposium on Computer Architecture (ISCA'04), pp. 364-375. Munchen Germany, June 2004.
DRUM DOI
Abstract
VLIW architecture based DSPs have become widespread due to the combined benefits of simple hardware and compiler-extracted
instruction-level parallelism. However, the VLIW instruction set architecture and its hardware implementation are tightly coupled,
especially so for Non-Unit Assumed Latency (NUAL) VLIWs. The problem of object code compatibility across processors having different numbers of functional units or hardware latencies has been
the Achilles' heel of this otherwise powerful architecture. In this paper, we propose eXtended Split-Issue (XSI), a novel mechanism
that breaks the instruction packet syntax of an NUAL VLIW compiler without violating the dataflow dependences. XSI provides a designer
the freedom of disassociating the hardware implementation of the NUAL VLIW processor from the instruction set architecture. Further, we investigate fairly radical (in the context of VLIW) changes to the
hardware—like removing an adder, adding a multiplier, and incorporating simultaneous multithreading (SMT)—to show that our
technique works for a variety of hardware configurations without compromising on performance. The technique can be used in both single-threaded and multi-threaded architectures to achieve a level
of flexibility heretofore unavailable in the VLIW arena.