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Radio Frequency Effects on the Clock Networks of Digital Circuits

dc.contributor.authorWang, Hongxia
dc.contributor.authorDirik, Cagdas
dc.contributor.authorRodriguez, Samuel V.
dc.contributor.authorGole, Amol V.
dc.contributor.authorJacob, Bruce
dc.date.accessioned2007-11-08T18:43:57Z
dc.date.available2007-11-08T18:43:57Z
dc.date.issued2004-08
dc.identifier.citation"Radio frequency effects on the clock networks of digital circuits." Hongxia Wang, Cagdas Dirik, Samuel V. Rodriguez, Amol V. Gole and Bruce Jacob. Proc. IEEE International Symposium on Electromagnetic Compatibility (EMC 2004), pp. 93-96. Santa Clara CA, August 2004.en
dc.identifier.urihttp://hdl.handle.net/1903/7454
dc.description.abstractRadio frequency interference (RFI) can have adverse effects on commercial electronics. Current properties of high performance integrated circuits (ICs), such as very small feature sizes, high clock frequencies, and reduced voltage levels, increase the susceptibility of these circuits to RFI, causing them to be more prone to smaller interference levels. Also, recent developments of mobile devices and wireless networks create a hostile electromagnetic environment for ICs. Therefore, it is important to measure the susceptibility of ICs to RFI. In this study, we investigate the susceptibility levels to RFI of the clock network of a basic digital building block. Our experimental setup is designed to couple a pulse modulated RF signal using the pin direct injection method. The device under test is an 8-bit ripple counter, designed and fabricated using AMI 0.5 μm process technology. Our experiments showed that relatively low levels of RFI (e.g., 16.8 dBm with carrier frequency of 1 GHz) could adversely affect the normal functioning of the device under test.en
dc.format.extent1309774 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_USen
dc.subjectRFIen
dc.subjectPin direct injection methoden
dc.subjectPower reflection coefficienten
dc.subjectPulsed modulated RFen
dc.subjectClock networken
dc.titleRadio Frequency Effects on the Clock Networks of Digital Circuitsen
dc.typePresentationen
dc.relation.isAvailableAtA. James Clark School of Engineeringen_us
dc.relation.isAvailableAtElectrical & Computer Engineeringen_us
dc.relation.isAvailableAtDigital Repository at the University of Marylanden_us
dc.relation.isAvailableAtUniversity of Maryland (College Park, MD)en_us


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