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    The Performance and Energy Consumption of Embedded Real-Time Operating Systems

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    UMD-SCA-TR-2000-04.pdf (292.8Kb)
    No. of downloads: 539

    Date
    2000-11
    Author
    Baynes, Kathleen
    Collins, Chris
    Fiterman, Eric
    Smit, Christine
    Zhang, Tiebing
    Jacob, Bruce
    Citation
    "The performance and energy consumption of embedded real-time operating systems." K. Baynes, C. Collins, E. Fiterman, B. Ganesh, P. Kohout, C. Smit, T. Zhang, and B. Jacob. IEEE Transactions on Computers, vol. 52, no. 11, pp. 1454-1469. November 2003.
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    Abstract
    This paper presents the modeling of embedded systems with SimBed, an execution-driven simulation testbed that measures the execution behavior and power consumption of embedded applications and RTOSs by executing them on an accurate architectural model of a microcontroller with simulated real-time stimuli. We briefly describe the simulation environment and present a study that compares three RTOSs: μ C/OS-II, a popular public-domain embedded real-time operating system; Echidna, a sophisticated, industrial-strength (commercial) RTOS; and NOS, a bare-bones multi-rate task scheduler reminiscent of typical “roll-your-own” RTOSs found in many commercial embedded systems. The microcontroller simulated in this study is the Motorola M-CORE processor: a low-power, 32-bit CPU core with 16-bit instructions, running at 20MHz. Our simulations show what happens when RTOSs are pushed beyond their limits, and they depict situations in which unexpected interrupts or unaccounted-for task invocations disrupt timing, even when the CPU is lightly loaded. In general, there appears no clear winner in timing accuracy between preemptive systems and cooperative systems. The power-consumption measurements show that RTOS overhead is a factor of two to four higher than it needs to be, compared to the energy consumption of the minimal scheduler. In addition, poorly designed idle loops can cause the system to double its energy consumption—energy that could be saved by a simple hardware sleep mechanism.
    URI
    http://hdl.handle.net/1903/7437
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