Institute for Systems Research

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Author: search.filters.author.Verahrami, F.B.Subject: search.filters.subject.Cramer-Rao lower bound (CRLB)

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    VLSI Implemented ML Joint Carrier Phase and Timing Offsets Joint Estimator for QPSK/QQPSK Burst Modems
    (1999) Jiang, Yimin; Verahrami, F.B.; Richmond, R.L.; Baras, John S.; Baras, John S.; ISR; CSHCN
    A high performance ASIC supporting multiple modulation, error correction, and frame formats is under development at Hughes Network Systems, Inc. Powerful and generic data-aided (DA) estimators are needed to accommodate operation in the required modes. In this paper, a simplified DA maximum likelihood (ML) joint estimator for carrier phase and symbol timing offset for QPSK/OQPSK burst modems and a sample systolic VLSI implementation for the estimator are presented.

    Furthermore, the Cramer-Rao lower bound (CRLB) for DA case is investigated. The performance of the estimator is shown through simulation to meet the CRLB even at low signal-to-noise ratios (SNR). Compared with theoretical solutions, the proposed estimator is less computationally intensive and is therefore easier to implement using current VLSI technology. IEEE Wireless Communications and Networking Conference: WCNC'99

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    Data-Aided ML Parameter Estimators of PSK Burst Modems and Their Systolic VLSI Implementations
    (1999) Jiang, Yimin; Ting, W-C.; Verahrami, F.B.; Richmond, R.L.; Baras, John S.; Baras, John S.; ISR; CSHCN
    A high performance Universal Modem ASIC that supports several modulation types and burst mode frame formats is under development. Powerful and generic data-aided (DA) parameter estimators are necessary to accommodate many modes.

    In this paper we present an approximated maximum likelihood (ML) carrier frequency offset estimator, ML joint carrier phase and timing offsets estimator and their systolic VLSI implementations for PSK burst modems. The performances are close to the Cramer-Rao lower bounds (CRLB) at low SNRs.

    Compared with theoretical solutions, the estimators proposed here are much simpler and easier to implement by the current VLSI technology. The CRLB for DA estimations is discussed in some depth, some issues on training sequence design is also addressed in this work.

    Globecomm99

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    VLSI Implemented Data-Aided ML Parameter Estimators of PSK Burst Modems
    (1999) Jiang, Yimin; Ting, W.C.; Verahrami, F.B.; Richmond, R.L.; Baras, John S.; Baras, John S.; ISR; CSHCN
    A high performance Universal Modem ASIC that supports several modulation types and burst mode frame formats is under development. The ASIC is designed to work under stringent conditions such as large carrier frequency offset (up to 13 percent symbol rate) and low signal-to-noise ratio (SNR). Powerful and generic data-aided (DA) parameter estimators are necessary to accommodate many modes.

    In this paper we present an approximated maximum likelihood (ML) carrier frequency offset estimator, ML joint carrier phase and timing offsets estimator and their systolic VLSI implementations for PSK burst modems. The performances are close to the Cramer-Rao lower bounds (CRLB) at low SNRs. Compared with theoretical solutions the estimators proposed here are much simpler and easier to implement by the current VLSI technology.

    VTC'99