Electrical & Computer Engineering

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    Microwave Nonlinearities in Photodiodes
    (1994) Williams, Keith Jake; Dagenais, Mario; Electrical & Computer Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, MD)
    The nonlinearities in p-i-n photodiodes have been measured and numerically modeled. Harmonic distortion, response reduction, and sinusoidal output distortion measurements were made with two singlefrequency offset-phased-locked Nd: YAG lasers, which provided a source dynamic range greater than 130 dB, a 1 MHz to 50 GHz frequency range, and optical powers up to 10 mW. A semi-classical approach was used to solve the carrier transport in a one-dimensional p-i-n photodiode structure. This required the simultaneous solution of three coupled nonlinear differential equations: Poisson's equation and the hole and electron continuity equations. Space-charge electric fields, loading in the external circuit, and absorption in undepleted regions next to the intrinsic region all contributed to the nonlinear behavior described by these equations. Numerical simulations were performed to investigate and isolate the various nonlinear mechanisms. It was found that for intrinsic region electric fields below 50 kV/cm, the nonlinearities were influenced primarily by the space-charge electric-field-induced change in hole and electron velocities. Between 50 and 100kV/cm, the nonlinearities were found to be influenced primarily by changes in electron velocity for frequencies above 5 GHz and by p-region absorption below 1 GHz. Above 100 kV/cm, only p-region absorption could explain the observed nonlinear behavior, where only 8 to 14 nm of undepleted absorbing material next to the intrinsic region was necessary to model the observed second harmonic distortions of -60 dBc at 1 mA. Simulations were performed at high power densities to explain the observed response reductions and time distortions. A radially inward component of electron velocity was discovered, and under certain conditions, was estimated to have the same magnitude as the axial velocity. The model was extended to predict that maximum photodiode currents of 50 mA should be possible before a sharp increase in nonlinear output occurs. For capacitively-limited devices, the space-charge-induced nonlinearities were found to be independent of the intrinsic region length, while external circuit loading was determined to cause higher nonlinearities in shorter devices. Simulations indicate that second harmonic improvements of 40 to 60 dB may be possible if the photodiode can be fabricated without undepleted absorbing regions next to the intrinsic region.
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    Data Acquisition Interface of a VLSI Cochlea Model
    (1993) Edwards, Thomas G.; Shamma, Shihab; Electrical Engineering; Digital Repository at the University; University of Maryland (College Park, Md)
    Computer models of cochlear processing take exceedingly long times to run, even for short data sets. A data acquisition system was developed for a new switched-capacitor VLSI cochlea model chip, in order to rapidly perform cochleaI processing on digitzed speech samples. The system is capable of processing very long speech samples. Processing is in near-real-time, though it, takes about 2 minutes per second of speech to write the large amount of data to a hard drive. Software has also been developed to convert the output data into a form readable by the ESPS digital signal processing package from Entropic Speech, Inc.
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    Networks for Fast and Efficient Unicast and Multicast Communications
    (1992) Lee, Ching-Yi; Oruç, A. Yavuz; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, MD)
    This dissertation presents new results on networks for high-speed unicast and multicast communications which play key roles in communication networks and parallel computer systems. Specifically, (1) we present past parallel algorithms for routing any one-to-one assignment over Beneš network, we propose new multicasting networks that can efficiently realize any one-to-many assignments, and we give an explicit construction of linear-size expanders with very large expansion coefficients. Our parallel routing algorithms for Beneš networks are realized on two different topologies. Using these algorisms, we show that any unicast assignment that involves )(k) pairs of inputs and outputs can be routed through and n-input Beneš network in O(log2 k+lg n) time without pipelining and O(lg k) time with pipelining if the topology is complete, and in O(lg4k+lg2k lg n) time without pipelining and O(lg3 k+lg k lg n) time with pipelining if the topology is extended perfect shuffle. These improve the best-known routing time complexities of parallel algorithms of Lev et al. and Nassimi and Sahni by a factor of O(lg n). Our multicasting networks uses a very simple self-routing scheme which requires no separate computer model for routing. Including the routing cost, it can be constructed with O(n lg2 n) bit-level constant fanin logic gates, O(lg2 n) bit-level depth, and can realize any multicast assignment in O(lg3 n) bit-level time. These complexities match or are better than those of multicasting networks with the same cost that were reported in the literature. In addition to its attractive routing scheme, our multicasting network is input-initiated and can pipeline multicast assignments through itself. With pipelining, the average routing time for O(lg2 n) multicast assignments can be reduced to O(lg n) which is the best among those of the multicasting networks previously reported in the literature. Our linear-size expanders are explicitly constructed by following a traditional design and analysis technique. We construct a family of linear-size with density 33 and expansion coefficient 0.868. This expansion coefficient is the larges among the linear-size expanders that were similarly constructed. Using these expanders, we also report a family of explicitly constructed superconcentrators with density 208.
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    New Methods for the Detection and Interception of Unknown, Frequency-Hopped Waveforms
    (1990) Snelling, William Edward; Geraniotis, Evaggelos; Electrical & Computer Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md)
    Three new methods for the detection and interception of frequency-hopped waveforms are presented. The first method extends the optimal, fixed-block detection method based on the likelihood ratio to a sequential one based on the Sequential Probability Ratio Test (SPRT). The second method is structured around a compressive receiver and is highly efficient yet easily implemented. The third method is based on the new concept of Amplitude Distribution Function (ADF) and results in a detector that is an extension of the radiometer. The first method presents a detector structured to make a decision sequentially, that is, as each data element is collected. Initially, a purely sequential test is derived and shown to require fewer data for a decision. A truncated sequential method is also derived and shown to reduce the data needed for a decision while operating under poor signal-to-noise ratios (SNRs). A detailed performance analysis is presented along with numerical and Monte Carlo analyses of the detectors. The second method assumes stationary, colored Gaussian interference and presents a detailed model of the compressive receiver. A locally optimal detector is developed via the likelihood ratio theory and yields a reference to which previous ad hoc schemes are compared. A simplified, suboptimal scheme is developed that trades off duty cycle for performance, and a technique for estimating hop frequency is developed. The performance of the optimal and suboptimal detectors is quantified. For the suboptimal scheme, the trade-off with duty cycle is studied. The reliability of the hop frequency estimator is bounded and traded off against duty cycle. In the third method, a precise definition of the ADF is given, from which follows a convolutional relationship between the ADFs of signal and additive noise. A technique is given for deconvolving the ADF, with which signal and noise components can be separated. A detection statistic characterized, yielding a framework on which to synthesize a detector. The detector's performance is analyzed and compared with the radiometer.
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    Analysis of Control Strategies for a Human Skeletal System Pedaling a Bicycle
    (1995) Abbott, Scott Bradley; Levine, William S.; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md)
    The study of human locomotion has gained more attention recently with the availability of better analytic and computational tools with which to examine it. A subject under much study within the field today is the effort to model human motor control systems using control systems methods. Analytic, computational, and experimental studies of locomotion can produce models that provide further insight into the design and function of human systems, as well as provide directions for research into therapies for muscle and nerve related disorders affecting these systems. This thesis examines how computational methods can be utilized to study the functionality of these systems. Building on past research, dynamic models for a human skeletal system pedaling a bicycle are used as a basis for examining various methods of implementing inputs that will control the cycling. Two models are used – a three degree-of-freedom model implementing ideal torque inputs at the hip, knees, and feet, and a one degree-of-freedom model involving inputs at the hip and knee only. Both models are characterized by highly nonlinear dynamics, requiring the use of nonlinear analysis, optimization theory, and computational methods for examination. Control of the one degree-of­-freedom model has been addressed in previous work; here, parameterization of the control and the process of learning it is examined. Next, control strategies for the more complex three degree-of-freedom model are developed. Finally, results for upright and recumbent cycling are compared using the three degree-of-freedom model.
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    System Synthesis of Synchronous Multimedia Applications
    (IEEE, 1999-11) Qu, Gang; Mesarina, Malena; Potkonjak, Miodrag
    Modern system design is being increasingly driven by applications such as multimedia and wireless sensing and communications, which all have intrinsic quality of service (QoS) requirements, such as throughput, error-rate, and resolution. One of the most crucial QoS guarantees that the system has to provide is the timing constraints among the interacting media (synchronization) and within each media (latency). We have developed the first framework for systems design with timing QoS guarantees, latency and synchronization. In particular, we address how to design system-on-chip with minimal silicon area to meet timing constraints. We propose the two-phase design methodology. In the first phase, we select an architecture which facilitates the needs of synchronous low latency applications well. In the second phase, for a given processor configuration, we use our new scheduler in such a way that storage requirements are minimized. We have develop scheduling algorithms that solve the problem optimally for a-priori specified applications. The algorithms have been implemented and their effectiveness demonstrated on a set of simulated MPEG streams from popular movies.
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    The Associative-Skew Clock Routing Problem
    (IEEE, 1999-11) Chen, Yu; Kahng, Andrew B.; Qu, Gang; Zelikovsky, Alexander
    We introduce the associative skew clock routing problem, which seeks a clock routing tree such that zero skew is preserved only within identified groups of sinks. The associative skew problem is easier to address within current EDA frameworks than useful-skew (skew-scheduling) approaches, and defines an interesting tradeoff between the traditional zero-skew clock routing problem (one sink group) and the Steiner minimum tree problem (n sink groups). We present a set of heuristic building blocks, including an efficient and optimal method of merging two zero-skew trees such that zero skew is preserved within the sink sets of each tree. Finally, we list a number of open issues for research and practical application.
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    Power Minimization using System-Level Partitioning of Applications with Quality of Service Requirements
    (1999-11) Qu, Gang; Potkonjak, Miodrag
    Design systems to provide various quality of service (QoS) guarantees has received a lot of attentions due to the increasing popularity of real-time multimedia and wireless communication applications. Meanwhile, low power consumption is always one of the goals for system design, especially for battery-operated systems. With the design trend of integrating multiple processor cores and memory on a single chip, we address the problem of how to partition a set of applications among processors, such that all the individual QoS requirements are met and the total energy consumption is minimized. We exploit the advantages provided by the variable voltage design methodology to choose the voltage for each application on the same processor optimally for this purpose. We also discuss how to partition applications among the processors to achieve the same goal. We formulate the problem on an abstract QoS model and present how to allocate resources (e.g., CPU time) and determine the voltage profile for every single processor. Experiments on media benchmarks have also been studied.
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    Energy Minimization of System Pipelines Using Multiple Voltages
    (IEEE, 1999-05) Qu, Gang; Kirovski, Darko; Potkonjak, Miodrag; Srivastava, Mani B.
    Modem computer and communication system design has to consider the timing constraints imposed by communication and system pipelines, and minimize the energy consumption. We adopt the recent proposed model for communication pipeline latency[23] and address the problem of how to minimize the power consumption in system-level pipelines under the latency constraints by selecting supply voltage for each pipeline stage using the variable voltage core-based system design methodology[l 11. We define the problem, solve it optimally under realistic assumptions and develop algorithms for power minimization of system pipeline designs based on our theoretical results. We apply this new approach on the 4- stage Myrinet GAM pipeline, with the appropriate voltage profiles, we achieve 93.4%, 91.3% and 26.9% power reduction on three pipeline stages over the traditional design.
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    Optimization-Intensive Watermarking Techniques for Decision Problems
    (IEEE, 1999-06) Wong, Jennifer L.; Qu, Gang; Potkonjak, Miodrag
    Abstract—Recently, a number of watermarking-based intellectual property protection techniques have been proposed. Although they have been applied to different stages in the design process and have a great variety of technical and theoretical features, all of them share two common properties: 1) they are applied solely to optimization problems and 2) do not involve any optimization during the watermarking process. In this paper, we propose the first set of optimization-intensive watermarking techniques for decision problems. In particular, we demonstrate, by example of the Boolean satisfiability (SAT) problem, how one can select a subset of superimposed watermarking constraints so that the uniqueness of the signature and the likelihood of satisfying the satisfiability problem are simultaneously maximized. We have developed three SAT watermarking techniques: adding clauses, deleting literals, and push-out and pull-back. Each technique targets different types of signature-induced constraint superimposition on an instance of the SAT problem. In addition to comprehensive experimental validation, we theoretically analyze the potentials and limitations of the proposed watermarking techniques. Furthermore, we analyze the three proposed optimization-intensive watermarking SAT techniques in terms of their suitability for copy detection.