Dual-State Systolic Architectures for Adaptive Filtering Using Up/Downdating RLS

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dc.contributor.authorHsieh, S.F.en_US
dc.contributor.authorLiu, K.J. Rayen_US
dc.contributor.authorYao, K.en_US
dc.contributor.departmentISRen_US
dc.date.accessioned2007-05-23T09:48:00Z
dc.date.available2007-05-23T09:48:00Z
dc.date.issued1991en_US
dc.description.abstractWe propose a dual-state systolic structure to perform joint up/down-dating operations encountered in windowed recursive least squares (RLS) estimation problems. It is derived by successively performing Givens rotations for updating and hyperbolic rotations for down-dating. Due to the data independency, a series of Givens and hyperbolic rotations can be interleaved and parallel processing can be achieved by alternatively performing updating and downdating both in time and space. This flip-flop nature of up/down-dating characterizes the feature of dual-state systolic triarray. To further reduce the complexity and increase the throughput rate, Cordic cells can be used to mimic the operations of rowbroadcasting and only one control bit is required along each row of processors. Efficient implementation to obtain optimal residuals and a transformation of the hyperbolic rotation to an algebraically equivalent orthogonal operation to provide a more stable implementation are also considered. This systolic architecture is very promising in VLSI implementation of the sliding-window recursive least squares estimations.en_US
dc.format.extent876992 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/1903/5095
dc.language.isoen_USen_US
dc.relation.ispartofseriesISR; TR 1991-47en_US
dc.subjectfilteringen_US
dc.subjectsignal processingen_US
dc.subjectalgorithmsen_US
dc.subjectparallelen_US
dc.subjectVLSI architecturesen_US
dc.subjectSystems Integrationen_US
dc.titleDual-State Systolic Architectures for Adaptive Filtering Using Up/Downdating RLSen_US
dc.typeTechnical Reporten_US

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