Novel Parallel Architectures for Short-Time Fourier Transform

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dc.contributor.authorLiu, K.J. Rayen_US
dc.contributor.departmentISRen_US
dc.date.accessioned2007-05-23T09:49:51Z
dc.date.available2007-05-23T09:49:51Z
dc.date.issued1992en_US
dc.description.abstractIn this paper, novel parallel architectures for short-time Fourier transform based on adaptive time-recursive processing is proposed for efficient VLSI implementation. Only N - 1 multipliers and N + 1 adders are required. The proposed approach can be easily extended to multi-dimensional cases without the transpose operation. Various properties of the proposed architectures are also presented.en_US
dc.format.extent325253 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/1903/5186
dc.language.isoen_USen_US
dc.relation.ispartofseriesISR; TR 1992-4en_US
dc.subjectsignal processingen_US
dc.subjectparallel architecturesen_US
dc.subjectVLSI architecturesen_US
dc.subjectSystems Integrationen_US
dc.titleNovel Parallel Architectures for Short-Time Fourier Transformen_US
dc.typeTechnical Reporten_US

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