VLSI Algorithms and Architectures for Complex Householder Transformation with Applications to Array Processing
dc.contributor.author | Tang, C.F.T. | en_US |
dc.contributor.author | Liu, K.J. Ray | en_US |
dc.contributor.author | Hsieh, S.F. | en_US |
dc.contributor.author | Yao, K. | en_US |
dc.contributor.department | ISR | en_US |
dc.date.accessioned | 2007-05-23T09:48:39Z | |
dc.date.available | 2007-05-23T09:48:39Z | |
dc.date.issued | 1991 | en_US |
dc.description.abstract | The Householder transformation is considered to be desirable among various unitary transformations due to its superior computational efficiency and robust numerical stability. Specifically, the Householder transformation outperforms the Givens rotation and the modified Gram-Schmidt methods in numerical stability under finite-precision implementations, as well as requiring fewer arithmetical operations. Consequently, the QR decomposition based on the Householder transformation is promising for VLSI implementation and real-time high throughput modern signal processing. In this paper, a recursive complex Householder transformation with a fast initialization algorithm is proposed and its associated parallel/pipelined architecture is also considered. Then, a complex Householder transformation based recursive least-squares algorithm with a fast initialization is presented. Its associated systolic array processing architecture is also considered. | en_US |
dc.format.extent | 894551 bytes | |
dc.format.mimetype | application/pdf | |
dc.identifier.uri | http://hdl.handle.net/1903/5131 | |
dc.language.iso | en_US | en_US |
dc.relation.ispartofseries | ISR; TR 1991-84 | en_US |
dc.subject | signal processing | en_US |
dc.subject | parallel architectures | en_US |
dc.subject | VLSI architectures | en_US |
dc.subject | Systems Integration | en_US |
dc.title | VLSI Algorithms and Architectures for Complex Householder Transformation with Applications to Array Processing | en_US |
dc.type | Technical Report | en_US |
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