Focused ion beam (FIB) techniques were used to construct junction field effect transistors (JFETs) on a mesa of n-type silicon on an SOI chip. The implantation and metal contacts were made by FIB, which suggests that this technique can be used to make transistors in a non-standard geometry, such as the tip of a scanning probe or on a MEMS structure. FIB dopant implantation was used to direct-write the source, gate, and drain regions of each device. The contact resistance of platinum grown on silicon by FIB-induced deposition was investigated, and found to be suitable for producing ohmic contacts to heavily doped silicon. Several proof-of-concept devices were made with FIB deposited platinum as contacts to demonstrate the technique's potential. Other devices were created with conventional aluminum contacts instead of FIB-platinum as a control set, to isolate and investigate the effect of variable gate doping on device characteristics. All devices were 90 μm by 90 μm with a gate length of 1 μm. A graded doping profile was found to be an effective means of decreasing the short-channel effects that result in increasing source-drain current past saturation.