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dc.contributor.advisorBhattacharyya, Shuvra S.en_US
dc.contributor.authorKo, Ming-Yungen_US
dc.date.accessioned2006-06-14T05:47:35Z
dc.date.available2006-06-14T05:47:35Z
dc.date.issued2006-04-26en_US
dc.identifier.urihttp://hdl.handle.net/1903/3459
dc.description.abstractSignal processing applications usually encounter multi-dimensional real-time performance requirements and restrictions on resources, which makes software implementation complex. Although major advances have been made in embedded processor technology for this application domain -- in particular, in technology for programmable digital signal processors -- traditional compiler techniques applied to such platforms do not generate machine code of desired quality. As a result, low-level, human-driven fine tuning of software implementations is needed, and we are therefore in need of more effective strategies for software implementation for signal processing applications. In this thesis, a number of important memory and performance optimization problems are addressed for translating high-level representations of signal processing applications into embedded software implementations. This investigation centers around signal processing-oriented dataflow models of computation. This form of dataflow provides a coarse grained modeling approach that is well-suited to the signal processing domain and is increasingly supported by commercial and research-oriented tools for design and implementation of signal processing systems. Well-developed dataflow models of signal processing systems expose high-level application structure that can be used by designers and design tools to guide optimization of hardware and software implementations. This thesis advances the suite of techniques available for optimization of software implementations that are derived from the application structure exposed from dataflow representations. In addition, the specialized architecture of programmable digital signal processors is considered jointly with dataflow-based analysis to streamline the optimization process for this important family of embedded processors. The specialized features of programmable digital signal processors that are addressed in this thesis include parallel memory banks to facilitate data parallelism, and signal-processing-oriented addressing modes and address register management capabilities. The problems addressed in this thesis involve several inter-related features, and therefore an integrated approach is required to solve them effectively. This thesis proposes such an integrated approach, and develops the approach through formal problem formulations, in-depth theoretical analysis, and extensive experimentation.en_US
dc.format.extent1197824 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.titleIntegrated Software Synthesis for Signal Processing Applicationsen_US
dc.typeDissertationen_US
dc.contributor.publisherDigital Repository at the University of Marylanden_US
dc.contributor.publisherUniversity of Maryland (College Park, Md.)en_US
dc.contributor.departmentElectrical Engineeringen_US
dc.subject.pqcontrolledComputer Scienceen_US
dc.subject.pqcontrolledEngineering, Electronics and Electricalen_US
dc.subject.pquncontrolledblock diagram compileren_US
dc.subject.pquncontrolleddataflowen_US
dc.subject.pquncontrolledcomputer aided designen_US
dc.subject.pquncontrolledcode generationen_US
dc.subject.pquncontrolledembedded systemsen_US
dc.subject.pquncontrolledautomatic programmingen_US


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