DEVICE DEVELOPMENT AND CHARACTERIZATION FOR SOLID-STATE QUANTUM COMPUTATION

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2021

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Solid-state quantum computing devices are among the most promising candidates for realizing quantum computers, due to the characteristics that they are more versatile and more easily scalable compared to other implementations, and the anticipated integration with existing silicon device fabrication and nanoscale technology. In the solid-state quantum computing field, superconducting and semiconducting qubits have achieved tremendous progress. However, there still exist issues such as material instabilities, device vulnerabilities, fabrication complexities, measurement noise, etc., that hinder the performance improvement in the device level. In addition, the future of large scale quantum computing relies on efficiently transducing quantum information between different bases, which requires mutually compatible devices and materials.

In this thesis, I report on the device development and characterization for solving issues and improving performance in two solid-state quantum computing fields -- superconducting and semiconducting, and finally propose and evaluate a device architecture of compatibly integrating these two types of quantum computing devices for qubit implementation. For superconducting quantum computing, the material instability of aluminum oxide ($\rm{AlO}_x$), which is thought to be a decoherence source in superconducting quantum computing circuits, is remarkably mitigated on single-electron devices with Al/$\rm{AlO}_x$/Al tunnel junctions. By employing plasma oxidation and ultra-high vacuum (UHV) chambers, one manifestation of $\rm{AlO}_x$ instability -- the long-term charge offset drift of Al/$\rm{AlO}_x$/Al single-electron transistors (SETs) is significantly reduced (best $\Delta{Q_0}=0.13$ e $\pm$ 0.01 e over $\approx7.6$ days and no observation of $\Delta{Q_0}$ exceeding 1 e), compared to the results of devices with conventionally fabricated Al/$\rm{AlO}_x$/Al tunnel junctions in previous studies (best $\Delta{Q_0}=0.43$ e $\pm$ 0.007 e over $\approx9$ days and most $\Delta{Q_0}\ge1$ e within one day). For semiconducting quantum computing, robust single metal gate layer metal-oxide-semiconductor (MOS) quantum dot devices are developed for improving fabrication efficiency and reducing failure modes, with sufficient device performance for diagnostic qubits. No failures with gate voltage excursions $>10$ V are observed. Quantum dot formation, capacitive charge sensing with signal-to-noise ratio ($\rm{SNR}>5$) sufficient for spin readout, and reasonable effective electron temperatures ($T_e\approx200$ mK) that enable spin qubit studies, are demonstrated. Along the device development, measurement noise that determines the performance of device characterization is also studied and improved. The noise level in a dilution refrigerator with $\approx10$ mK base temperature is substantially lowered from $\approx4$ K to $<0.5$ K. Finally, the device design, modeling, and theoretical calculations of integrating the charge stability improved Al/$\rm{AlO}_x$/Al SETs with the streamlined, robust silicon MOS quantum dots are presented for advancing an integrated solid-state qubit platform. An analytical method is proposed to evaluate the device feasibility and find the optimal operating point for performing charge sensing and spin readout, which can be used to optimize device design and guide experimental measurement for better qubit performance in versatile spin qubit scenarios. Via increasing the charging energy of the charge sensor by a factor of 2, the SNR at the optimal operating point can be improved by a factor of $\approx6$. These achievements together are building blocks to implement an integrated solid-state qubit platform integrating semiconducting and superconducting devices, with the capability of transducing quantum information between different bases.

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