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PROTOTYPING THE SIMULATION OF A GATE LEVEL LOGIC APPLICATION PROGRAM INTERFACE (API) ON AN EXPLICIT-MULTI-THREADED (XMT) COMPUTER

dc.contributor.advisorVishkin, Uzien_US
dc.contributor.authorgu, peien_US
dc.date.accessioned2005-08-03T15:15:19Z
dc.date.available2005-08-03T15:15:19Z
dc.date.issued2005-05-31en_US
dc.identifier.urihttp://hdl.handle.net/1903/2626
dc.description.abstractExplicit-multi-threading (XMT) is a parallel programming approach for exploiting on-chip parallelism. Its fine-grained SPMD programming model is suitable for many computing intensive applications. In this paper, we present a parallel gate level logic simulation algorithm and study its implementation on an XMT processor. The test results show that hundreds-fold speedup can be achieved.en_US
dc.format.extent253717 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.titlePROTOTYPING THE SIMULATION OF A GATE LEVEL LOGIC APPLICATION PROGRAM INTERFACE (API) ON AN EXPLICIT-MULTI-THREADED (XMT) COMPUTERen_US
dc.typeThesisen_US
dc.contributor.publisherDigital Repository at the University of Marylanden_US
dc.contributor.publisherUniversity of Maryland (College Park, Md.)en_US
dc.contributor.departmentElectrical Engineeringen_US
dc.subject.pqcontrolledComputer Scienceen_US


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