UMD Theses and Dissertations
Permanent URI for this collectionhttp://hdl.handle.net/1903/3
New submissions to the thesis/dissertation collections are added automatically as they are received from the Graduate School. Currently, the Graduate School deposits all theses and dissertations from a given semester after the official graduation date. This means that there may be up to a 4 month delay in the appearance of a given thesis/dissertation in DRUM.
More information is available at Theses and Dissertations at University of Maryland Libraries.
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Item Reservoir Computing with Boolean Logic Network Circuits(2021) Komkov, Heidi; Lathrop, Daniel P; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)To push the frontiers of machine learning, completely new computing architectures must be explored which efficiently use hardware resources. We test an unconventional use of digital logic gate circuits for reservoir computing, a machine learning algorithm that is used for rapid time series processing. In our approach, logic gates are configured into networks that can exhibit complex dynamics. Rather than the gates explicitly computing pre-programmed instructions, they are used collectively as a dynamical system that transforms input data into a higher dimensional representation. We probe the dynamics of such circuits using discrete components on a circuit board as well as an FPGA implementation. We show favorable machine learning performance, including radiofrequency classification accuracy comparableto a state of the art convolutional neural network with a fraction of the trainable parameters. Finally, we discuss the design and fabrication of a reservoir computing ASIC for high-speed time series processing.Item Complex dynamics of a microwave time-delayed feedback loop(2013) Dao, Hien Thi Le; Murphy, Thomas E; Rodgers, John C; Chemical Physics; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)The subject of this thesis is deterministic behaviors generated from a microwave time-delayed feedback loop. Time-delayed feedback systems are especially interesting because of the rich variety of dynamical behaviors that they can support. While ordinary differential equations must be of at least third-order to produce chaos, even a simple first-order nonlinear delay differential equation can produce higher-dimensional chaotic dynamics. The system reported in the thesis is governed by a very simple nonlinear delay differential equation. The experimental implementation uses both microwave and digital components to achieve the nonlinearity and time-delayed feedback, respectively. When a sinusoidal nonlinearity is incorporated, the dynamical behaviors range from fixed-point to periodic to chaotic depending on the feedback strength. The microwave frequency modulated chaotic signal generated by this system offers advantages in range and velocity sensing applications. When the sinusoidal nonlinearity is replaced by a binary nonlinearity, the system exhibits a complex periodic attractor with no fixed-point solution. Although there are many classic electronic circuits that produce chaotic behavior, microwave sources of chaos are especially relevant in communication and sensing applications where the signal must be transmitted between locations. The system also can exhibit random walk behavior when being operated in a higher feedback strength regime. Depending on the feedback strength values, the random behaviors can have properties of a regular or fractional Brownian motion. By unidirectional coupling two systems in the baseband, envelope synchronization between two deterministic Brownian motions can be achieved.Item HARDWARE AND SOFTWARE ARCHITECTURES FOR ENERGY- AND RESOURCE-EFFICIENT SIGNAL PROCESSING SYSTEMS(2014) Cho, Inkeun; Bhattacharyya, Shuvra S.; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)For a large class of digital signal processing (DSP) systems, design and implementation of hardware and software is challenging due to stringent constraints on energy and resource requirements. In this thesis, we develop methods to address this challenge by proposing new constraint-aware system design methods for DSP systems, and energy- and resource-optimized designs of key DSP subsystems that are relevant across various application areas. In addition to general methods for optimizing energy consumption and resource utilization, we present streamlined designs that are specialized to efficiently address platform-dependent constraints. We focus on two specific aspects in development of energy- and resource-optimized design techniques: (1) Application-specific systems and architectures for energy- and resource- efficient design. First, we address challenges in efficient implementation of wireless sensor network building energy monitoring systems (WSNBEMSs). We develop new energy management schemes in order to maximize system lifetime for WSNBEMSs, and demonstrate that system lifetime can be improved significantly without affecting monitoring accuracy. We also present resource efficient, field programmable gate array (FPGA) architecture for implementation of orthogonal frequency division multiplexing (OFDM) systems. We have demonstrated that our design provides at least 8.8% enhancement in terms of resource efficiency compared to Xilinx FFT v7.1 within the same OFDM configuration. (2) Dataflow-based methods for structured design and implementation of energy- and resource- efficient DSP systems. First, we introduce a dataflow-based design approach based on integrating interrupt-based signal acquisition in context of parameterized synchronous dataflow (PSDF) modeling. We demonstrate that by applying our approach, energy- and resource-efficient embedded software can be derived systematically from high level models of dynamic, data-driven applications systems (DDDASs) functional structure. Also, we present an in-depth development of lightweight dataflow-Verilog (LWDF-V), which is an integration of the LWDF programming model with the Verilog hardware description language (HDL), and we demonstrate the utility of LWDF-V for design and implementation of digital systems for signal processing. We emphasize efficient of LWDF with HDLs, and emphasize the application of LWDF-V to design DSP systems with dynamic parameters on FPGA platforms.Item Modeling and Experimental Techniques to Demonstrate Nanomanipulation With Optical Tweezers(2011) Balijepalli, Arvind K.; Gupta, Satyandra K; LeBrun, Thomas W; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)The development of truly three-dimensional nanodevices is currently impeded by the absence of effective prototyping tools at the nanoscale. Optical trapping is well established for flexible three-dimensional manipulation of components at the microscale. However, it has so far not been demonstrated to confine nanoparticles, for long enough time to be useful in nanoassembly applications. Therefore, as part of this work we demonstrate new techniques that successfully extend optical trapping to nanoscale manipulation. In order to extend optical trapping to the nanoscale, we must overcome certain challenges. For the same incident beam power, the optical binding forces acting on a nanoparticle within an optical trap are very weak, in comparison with forces acting on microscale particles. Consequently, due to Brownian motion, the nanoparticle often exits the trap in a very short period of time. We improve the performance of optical traps at the nanoscale by using closed-loop control. Furthermore, we show through laboratory experiments that we are able to localize nanoparticles to the trap using control systems, for sufficient time to be useful in nanoassembly applications, conditions under which a static trap set to the same power as the controller is unable to confine a same-sized particle. Before controlled optical trapping can be demonstrated in the laboratory, key tools must first be developed. We implement Langevin dynamics simulations to model the interaction of nanoparticles with an optical trap. Physically accurate simulations provide a robust platform to test new methods to characterize and improve the performance of optical tweezers at the nanoscale, but depend on accurate trapping force models. Therefore, we have also developed two new laboratory-based force measurement techniques that overcome the drawbacks of conventional force measurements, which do not accurately account for the weak interaction of nanoparticles in an optical trap. Finally, we use numerical simulations to develop new control algorithms that demonstrate significantly enhanced trapping of nanoparticles and implement these techniques in the laboratory. The algorithms and characterization tools developed as part of this work will allow the development of optical trapping instruments that can confine nanoparticles for longer periods of time than is currently possible, for a given beam power. Furthermore, the low average power achieved by the controller makes this technique especially suitable to manipulate biological specimens, but is also generally beneficial to nanoscale prototyping applications. Therefore, capabilities developed as part of this work, and the technology that results from it may enable the prototyping of three-dimensional nanodevices, critically required in many applications.Item High-Performance 3D Image Processing Architectures for Image-Guided Interventions(2008-04-21) Dandekar, Omkar; Shekhar, Raj; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Minimally invasive image-guided interventions (IGIs) are time and cost efficient, minimize unintended damage to healthy tissues, and lead to faster patient recovery. Advanced three-dimensional (3D) image processing is a critical need for navigation during IGIs. However, achieving on-demand performance, as required by IGIs, for these image processing operations using software-only implementations is challenging because of the sheer size of the 3D images, and memory and compute intensive nature of the operations. This dissertation, therefore, is geared toward developing high-performance 3D image processing architectures, which will enable improved intraprocedural visualization and navigation capabilities during IGIs. In this dissertation we present an architecture for real-time implementation of 3D filtering operations that are commonly employed for preprocessing of medical images. This architecture is approximately two orders of magnitude faster than corresponding software implementations and is capable of processing 3D medical images at their acquisition speeds. Combining complementary information through registration between pre- and intraprocedural images is a fundamental need in the IGI workflow. Intensity-based deformable registration, which is completely automatic and locally accurate, is a promising approach to achieve this alignment. These algorithms, however, are extremely compute intensive, which has prevented their clinical use. We present an FPGA-based architecture for accelerated implementation of intensity-based deformable image registration. This high-performance architecture achieves over an order of magnitude speedup when compared with a corresponding software implementation and reduces the execution time of deformable registration from hours to minutes while offering comparable image registration accuracy. Furthermore, we present a framework for multiobjective optimization of finite-precision implementations of signal processing algorithms that takes into account multiple conflicting objectives such as implementation accuracy and hardware resource consumption. The evaluation that we have performed in the context of FPGA-based image registration demonstrates that such an analysis can be used to enhance automated hardware design processes, and efficiently identify a system configuration that meets given design constraints. In addition, we also outline two novel clinical applications that can directly benefit from these developments and demonstrate the feasibility of our approach in the context of these applications. These advances will ultimately enable integration of 3D image processing into clinical workflow.Item HARDWARE-ACCELERATED AUTOMATIC 3D NONRIGID IMAGE REGISTRATION(2007-05-02) Hemaraj, Yashwanth; Shekhar, Raj; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Software implementations of 3D nonrigid image registration, an essential tool in medical applications like radiotherapies and image-guided surgeries, run excessively slow on traditional computers. These algorithms can be accelerated using hardware methods by exploiting parallelism at different levels in the algorithm. We present here, an implementation of a free-form deformation-based algorithm on a field programmable gate array (FPGA) with a customized, parallel and pipelined architecture. We overcome the performance bottlenecks and gain speedups of up to 40x over traditional computers while achieving accuracies comparable to software implementations. In this work, we also present a method to optimize the deformation field using a gradient descent-based optimization scheme and solve the problem of mesh folding, commonly encountered during registration using free-form deformations, using a set of linear constraints. Finally, we present the use of novel dataflow modeling tools to automatically map registration algorithms to hardware like FPGAs while allowing for dynamic reconfiguration.Item Model-based Hardware Design for Image Processing Systems(2006-11-27) Sen, Mainak; Bhattacharyya, Shuvra S; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Model-based design has been touted as the most viable design methodology of the future for the design of embedded hardware/software systems. Due to the large complexity of modern embedded systems, it is more and more error-prone to design systems without having a formal model to support and verify the application at design time. Also, formal models generally capture broad classes of applications, and thus any innovation on a modeling technique has the potential to enhance every individual application in the associated class. Often, a formal model captures the high-level abstraction of an application, which is lost in the final implementation, and thus modeling gives an effective platform to perform high-level design optimizations. Dataflow graphs have been widely used as formal models in the signal processing domain for a long time, and various commercial tools have adopted dataflow semantics for model-based design methodology. In this thesis, we develop a new dataflow meta-modeling technique, called homogeneous parameterized dataflow (HPDF). HPDF is a meta-modeling technique in that it can be applied to a variety of underlying dataflow models of computation to enhance their expressive power, while maintaining much of the useful structure of the underlying models. HPDF addresses an important range of applications, especially in the image processing domain. We present various properties and capabilities of HPDF, including the notions of repetitions vector, valid schedule, derivation of looped schedules, single-rate equivalent graphs, and HPDF graph transformation methods. We also give three in-depth examples of complex systems that we have studied to demonstrate the capabilities of HPDF -- a gesture recognition application, an image registration application, and a gait-DNA application. For hardware implementation, we target our applications onto Xilinx and Altera field programmable gate arrays (FPGAs), and we present results from the hardware mapping of the gesture recognition and the image registration application. To build a foundation for further broadening the impact of HPDF modeling, we present initial work on applying cyclo-static dataflow as an intermediate representation for mapping MATLAB programs into hardware implementations. Because of the compatibility between cyclo-static dataflow and the HPDF meta-modeling approach, which we demonstrate in Chapter 3 of this thesis, this is an important first step to exploiting HPDF techniques in the context of MATLAB-to-hardware synthesis. In particular, we focus on relating cyclo-static dataflow to Compaan process networks, which is a variant of the Kahn process network model of computation that has been shown to be useful in representing concurrency in MATLAB programs. In summary, this thesis develops a useful new meta-modeling approach for implementing an important class of image processing applications, and develops and extensively demonstrates a methodology for efficient hardware implementation from representations in the proposed new meta-model.Item INTEGRATED INPUT MODELING AND MEMORY MANAGEMENT FOR IMAGE PROCESSING APPLICATIONS(2005-12-07) Haim, Fiorella; Bhattacharyya, Shuvra S; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Image processing applications often demand powerful calculations and real-time performance with low power and energy consumption. Programmable hardware provides inherent parallelism and flexibility making it a good implementation choice for this application domain. In this work we introduce a new modeling technique combining Cyclo-Static Dataflow (CSDF) base model semantics and Homogeneous Parameterized Dataflow (HPDF) meta-modeling framework, which exposes more levels of parallelism than previous models and can be used to reduce buffer sizes. We model two different applications and show how we can achieve efficient scheduling and memory organization, which is crucial for this application domain, since large amounts of data are processed, and storing intermediate results usually requires the use of off-chip resources, causing slower data access and higher power consumption. We also designed a reusable wishbone compliant memory controller module that can be used to access the Xilinx Multimedia Board's memory chips using single accesses or burst mode.