Synergistic Configurable Ring Oscillator PUF: Design, Characterization, and Implementation

Abstract

Silicon Physical Unclonable Function (PUF) is a novel hardware primitive that uses the intrinsic variation of integrated circuit manufacturing process for various security applications. Ring oscillator PUF (RO PUF) is one of the most popular silicon PUFs due to its ease of implementation on both ASIC and FPGA. However, RO PUF can have severe reliability issues when the operating environment deviates from the normal environment and security issues when it lacks an efficient anti-cloning mechanism. In this work, we propose a novel approach to build reliable RO PUF efficiently and enhance its resistance against physical cloning attack. The key idea of our approach is to construct ring oscillators with carefully selected inverters during the testing phase after the chip is fabricated. Our experimental results show that our configurable approach outperforms the traditional RO PUF and 1-out-of-8 PUF by generating more reliable bits that pass the NIST randomness tests. Our approach is also more hardware efficient than these RO PUFs. We also demonstrate that the configuration vectors can prevent physical cloning and have the potential usage in chip-dependent applications such as device authentication.