A High-Level Interactive System for Designing VLSI Signal Processors.
| dc.contributor.author | Owens, R.M. | en_US |
| dc.contributor.author | JaJa, Joseph F. | en_US |
| dc.contributor.department | ISR | en_US |
| dc.date.accessioned | 2007-05-23T09:33:57Z | |
| dc.date.available | 2007-05-23T09:33:57Z | |
| dc.date.issued | 1985 | en_US |
| dc.description.abstract | This paper describes a high-level interactive system that can be used to generate VLSI designs for various operations in signal processing such as filtering, convolution and computing the discrete Fourier transform. The overall process is fully automated and requires that the user specifies only a few parameters such as operation, precision, size and architecture type. The built-in architectures are new digit-on-line bit-serial architectures that are based on recently derived fast algorithms for the above operations. The basic elements are compact and have a very small gate delay. We feel that our system will offer a flexible and easy to use tool that can produce practical designs which are easy to test, efficient and fast. | en_US |
| dc.format.extent | 1165124 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/1903/4383 | |
| dc.language.iso | en_US | en_US |
| dc.relation.ispartofseries | ISR; TR 1985-7 | en_US |
| dc.title | A High-Level Interactive System for Designing VLSI Signal Processors. | en_US |
| dc.type | Technical Report | en_US |
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