Lab-on-CMOS-Capacitance Sensor Array for Real-Time Cell Viability Measurements

Abstract

This project addresses the need to enhance the functionality and reusability of existing CMOS chips for monitoring cell viability and facilitating visual inspection. The primary challenge tackled is the reduction of research downtime due to inefficient sensor replacement and the improvement of data collection methods.

To achieve this, the project integrates PCB design software, CAD software, and programming languages, including VHDL, C, and MATLAB. PCB design is utilized to create strategic board configurations aimed at streamlining the data collection process and ensuring the creation of a reliable and replaceable cell viability measurement device. These methods synergistically enhance CMOS chip functionality and usability, with a focus on streamlining packaging, facilitating hot-swappable system development, and establishing a data readout system.

Key achievements encompass the development of a hot-swappable system for effortless CMOS chip replacement, streamlined packaging to bolster chip longevity, and the establishment of a real-time data readout system. These advancements notably enhance research efficiency and data quality by minimizing downtime and improving the correlation of capacitance measurements with direct visual observations of cell behavior.

In the broader context of lab-on-a-chip technology and sensor development, these achievements deepen our understanding of cell behavior and expedite progress in drug screening, disease diagnostics, and tissue engineering. The integrated approach presented in this research marks a significant advancement in pushing the boundaries of lab-on-a-chip technology and its applications in biomedical research.