POLYMORPHIC CIRCUITS: THE IDENTIFICATION OF POSSIBLE SOURCES AND APPLICATIONS

Abstract

Polymorphic gates are gates whose function depends on some external or environmental conditions. While there has been research into both the creation and applications of polymorphic gates, much remains unknown. This dissertation, motivated by the recent security applications of polymorphic gates, seeks a systematic approach to generating polymorphic gates.Its contributions include a polymorphic interoperability framework, the first study on the source of polymorphism, time-based polymorphic gates, and polymorphism in the sub-threshold design. Polymorphic circuits are commonly created with evolutionary algorithms [3]. Because the evolutionary algorithm operates in ways that are not always obvious, precise mechanisms of polymorphism are not immediately clear in the resulting gates and has not been reported before. This dissertation, for the first time, identifies multiple structures that impact the polymorphic nature of the gates, which sheds light on how to create polymorphic gates. This discovery is based on a categorization methodology that evaluates the quality of polymorphic gates and finds the robust ones for further investigation of polymorphism. By combining the discovered structures with the evolutionary algorithm, high quality polymorphic gates can be generated faster as demonstrated in the subthreshold design domain. Time-based polymorphism was discovered during the time analysis of evolved polymorphic circuits while searching for the sources of polymorphism. This occurs when the function of the circuit depends on the sample rate of the circuit and is based on some input combinations not quickly reaching the output they move towards. Therefore, when the circuit is running at different clock frequency, it may exhibit different functionality. This is time-based polymorphism. As one application of polymorphic gates, this dissertation presents a framework that can enhance the fault coverage of any fault testing method by utilizing polymorphic gates. The proposed framework starts with any traditional fault testing approach, and when it becomes less effective in covering uncovered faults, it employs a gate replacement strategy to selectively replace certain standard logic gates by polymorphic gates of specific polymorphism. This concept is demonstrated in the dissertation with examples of a D flip-flop and the ISCAS85 C17 benchmark. This work has high practical value in subthreshold design where circuit manufacture defects increase significantly. In summary, this dissertation presents multiple contributions to the study of polymorphic circuits. It discovers multiple sources of polymorphism and how the results of an evolutionary algorithm can be filtered into higher quality solutions. It also examines time-based polymorphism as a new form of polymorphism with security applications. Finally, an enhancement to stuck-at fault testing using polymorphic gates is presented. This allows for easier testing of corner-cases that are hard to detect using traditional methodologies and holds promise for improving the reliability of testing, particularly in the subthreshold domain.