Class: Computerized LAyout Solutions Using Simulated Annealing
| dc.contributor.author | Minis, Ioannis | en_US |
| dc.contributor.author | Harhalakis, George | en_US |
| dc.contributor.author | Jajodia, Satish K. | en_US |
| dc.contributor.author | Proth, J.M. | en_US |
| dc.contributor.department | ISR | en_US |
| dc.date.accessioned | 2007-05-23T09:46:28Z | |
| dc.date.available | 2007-05-23T09:46:28Z | |
| dc.date.issued | 1990 | en_US |
| dc.description.abstract | A new method (Computerized LAyout Solutions using Simulated annealing - CLASS) that considers the inter-cell and intra-cell layout problems in a cellular manufacturing environment is presented. It addresses the relative placement of equidimensional manufacturing entities within a discrete solution space in an attempt to minimize the total material flow (cost) between these entities. An approach to accommodate the relative sizes of the entities is also presented. The method is based on Simulated Annealing, which has been successfully applied for the solution of combinatorial problems. A major advantage of this technique is the insensitivity of the final solution to the initial conditions. In addition, some important practical issues such as intra-cell layout of machines in pre-determined configurations (e.g. row-wise or circular arrangements), have been addressed. Several comparisons were made with some of the existing approaches for facility layout, such as CRAFT, HC63-66, etc. that yielded results of equal or better quality for each of eight classical test problems. | en_US |
| dc.format.extent | 1272461 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/1903/5019 | |
| dc.language.iso | en_US | en_US |
| dc.relation.ispartofseries | ISR; TR 1990-71 | en_US |
| dc.subject | group technology | en_US |
| dc.subject | manufacturing | en_US |
| dc.subject | plant layout | en_US |
| dc.subject | Manufacturing Systems | en_US |
| dc.title | Class: Computerized LAyout Solutions Using Simulated Annealing | en_US |
| dc.type | Technical Report | en_US |
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