Development and Optimization of Integrative MEMS-Based Gray-Scale Technology In Silicon For Power MEMS Applications
dc.contributor.advisor | Ghodssi, Reza | en_US |
dc.contributor.author | Ghodssi, Reza | en_US |
dc.contributor.author | Waits, Christopher M. | en_US |
dc.contributor.author | Morgan, Brian C. | en_US |
dc.contributor.department | ISR | en_US |
dc.date.accessioned | 2007-05-23T10:15:43Z | |
dc.date.available | 2007-05-23T10:15:43Z | |
dc.date.issued | 2004 | en_US |
dc.description.abstract | As the field of micro-electro-mechanical systems (MEMS) has diversified, a growing number of applications are limited by the current planar technology available for fabrication. Gray-scale technology offers a method of fabricating 3-D structures in MEMS utilizing a single lithography step. Before gray-scale technology can be accepted as a universal/standard fabrication technique, methods for controlling the silicon profiles and integrating the necessary process steps must be developed. Here, an optical mask design method is outlined by which an arbitrary profile may be defined in a photoresist film, and a study is presented regarding the control of etch selectivity during deep reactive ion etching (DRIE). These results are then used to develop large controlled gradient silicon structures for the MIT micro-engine device that may be integrated into an existing process flow. | en_US |
dc.format.extent | 371503 bytes | |
dc.format.mimetype | application/pdf | |
dc.identifier.uri | http://hdl.handle.net/1903/6458 | |
dc.language.iso | en_US | en_US |
dc.relation.ispartofseries | ISR; TR 2004-42 | en_US |
dc.title | Development and Optimization of Integrative MEMS-Based Gray-Scale Technology In Silicon For Power MEMS Applications | en_US |
dc.type | Technical Report | en_US |
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