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dc.contributor.advisorWilliams, Ellen Den_US
dc.contributor.authorConrad, Brad Richarden_US
dc.date.accessioned2009-07-02T05:42:33Z
dc.date.available2009-07-02T05:42:33Z
dc.date.issued2009en_US
dc.identifier.urihttp://hdl.handle.net/1903/9154
dc.description.abstractNanoelectronics consist of devices with active electronic components on the nanometer length scale. At such dimensions most, if not all, atoms or molecules composing the active device region must be on or near a surface. Also, materials effectively confined to two dimensions, or when subject to abrupt boundary conditions, generally do not behave the same as materials inside three dimensional, continuous structures. This thesis is a quantitative determination of how surfaces and interfaces in organic nanoelectronic devices affect properties such as charge transport, electronic structure, and material fluctuations. Si/SiO<sub>2</sub> is a model gate/gate dielectric for organic thin film transistors, therefore proper characterization and measurement of the effects of the SiO<sub>2</sub>/organic interface on device structures is extremely important. I fabricated pentacene thin film transistors on Si/SiO<sub>2</sub> and varied the conduction channel thickness from effectively bulk (~40nm) to 2 continuous conducting layers to examine the effect of substrate on noise generation. The electronic spectral noise was measured and the generator of the noise was determined to be due to the random spatial dependence of grain boundaries, independent of proximity to the gate oxide. This result led me to investigate the mechanisms of pentacene grain formation, including the role of small quantities of impurities, on silicon dioxide substrates. Through a series of nucleation, growth and morphology studies, I determined that impurities assist in nucleation on SiO<sub>2</sub>, decreasing the stable nucleus size by a third and increasing the overall number of grains. The pentacene growth and morphology studies prompted further exploration of pentacene crystal growth on SiO<sub>2</sub>. I developed a method of making atomically clean ultra-thin oxide films, with surface chemistry and growth properties similar to the standard thick oxides. These ultra-thin oxides were measured to be as smooth as cleaned silicon and then used as substrates for scanning tunneling microscopy of pentacene films. The increased spatial resolution of this technique allowed for the first molecular resolution characterization of the standing-up pentacene crystal structure near the gate dielectric, with molecules oriented perpendicular to the SiO<sub>2</sub> surface. Further studies probed how growth of C<sub>60</sub> films on SiO<sub>2</sub> and pentacene surfaces affected C<sub>60</sub> morphology and electronic structure to better understand solar cell heterojunctions.en_US
dc.format.extent51999558 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.titleINTERFACE EFFECTS ON NANOELECTRONICSen_US
dc.typeDissertationen_US
dc.contributor.publisherDigital Repository at the University of Marylanden_US
dc.contributor.publisherUniversity of Maryland (College Park, Md.)en_US
dc.contributor.departmentPhysicsen_US
dc.subject.pqcontrolledPhysics, Condensed Matteren_US
dc.subject.pquncontrolledinterfaceen_US
dc.subject.pquncontrolledmorphologyen_US
dc.subject.pquncontrollednanoelectronicen_US
dc.subject.pquncontrolledorganicen_US
dc.subject.pquncontrolledpentaceneen_US
dc.subject.pquncontrolledsemiconductoren_US


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