Microwave or electromagnetic interference (EMI) can couple into electronic circuits and systems intentionally from high power microwave (HPM) sources or unintentionally due to the proximity to general electromagnetic (EM) environments, and cause "soft" reversible upsets and "hard" irreversible failures. As scaling-down of device feature size and bias voltage progresses, the circuits and systems become more susceptible to the interference. Thus, even low power interference can disrupt the operation of the circuits and systems. Furthermore, it is reported that even electronic systems under high level of shielding can be upset by intentional electromagnetic interference (IEMI), which has been drawing a great deal of concern from both the civil and military communities, but little has been done in terms of systematic study and investigation of these effects on IC circuits and devices.

We have investigated the effects of high power microwave interference on three levels, (a) on fundamental single MOSFET devices, (b) on basic CMOS IC inverters and cascaded inverters, and (c) on a representative large IC timer circuit for automotive applications. We have studied and identified the most vulnerable static and dynamic parameters of operation related to device upsets. Fundamental upset mechanisms in MOSFETs and CMOS inverters and their relation to the characteristics of microwave interference (power, frequency, width, and period) and the device properties such as size, mobility, dopant concentration, and contact resistances, were investigated. Critical upsets in n-channel MOSFET devices resulting in loss of amplifier characteristics, were identified for the power levels above 10dBm in the frequency range between 1 and 20 GHz. We have found that microwave interference induced excess charges are responsible for the upsets. Upsets in the static operation of CMOS inverters such as noise margins, output voltages, power dissipation, and bit-flip errors were identified using a load-line characteristic analysis. We developed a parameter extraction method that can predict the dynamic operation of inverters under microwave interference from DC load-line characteristics. Using the method, the effects of microwave interference on propagation delays, output voltage swings, and output currents as well as their relation to device scaling, were investigated. Two new critical hard error sources in MOSFETs and CMOS inverters regarding power dissipation and power budget disruption were found. EMI hardened design for digital circuits has been proposed to mitigate the stress on the devices, the contacts, and the interconnects. We found important new bit-flip and latch-up errors under pulsed microwave interference, which demonstrated that the excess charge effects are due to electron-hole pair generation under microwave interference. We proposed a theory of excess charge effects and obtained good agreement of our excess charge model with our experimental results. Further work is proposed to improve the vulnerabilities of integrated circuits.