INTEGRATED MODELING OF RELIABILITY AND PERFORMANCE OF 4H-SILICON CARBIDE POWER MOSFETS USING ATOMISTIC AND DEVICE SIMULATIONS
INTEGRATED MODELING OF RELIABILITY AND PERFORMANCE OF 4H-SILICON CARBIDE POWER MOSFETS USING ATOMISTIC AND DEVICE SIMULATIONS
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Date
2015
Authors
Perinthatta Ettisserry, Devanarayanan
Advisor
Goldsman, Neil
Citation
DRUM DOI
Abstract
4H-Silicon Carbide (4H-SiC) power MOSFET is a promising technology for future high-temperature and high-power electronics. However, poor device reliability and performance, that stem from the inferior quality of 4H-SiC/SiO2 interface, have hindered its development. This dissertation investigates the role of interfacial and near-interfacial atomic defects as the root cause of these key concerns. Additionally, it explores device processing strategies for mitigating reliability-limiting defects.
In order to understand the atomic nature of material defects, and their manifestations in electrical measurements, this work employs an integrated modeling approach together with experiments. Here, the electronic and structural properties of defects are analyzed using first-principles hybrid Density Functional Theory (DFT). The insights from first-principles calculations are integrated with conventional physics-based modeling techniques like Drift-Diffusion and Rate equation simulations to model various device characteristics. Subsequently, the atomic-level models are validated by comparison with experiments.
From device reliability perspective, this dissertation models the time-dependent worsening of threshold voltage (Vth) instability in 4H-SiC MOSFETs operated under High-Temperature and Gate-Bias (HTGB) conditions. It proposes a DFT-based oxygen-vacancy hole trap activation model, where certain originally ‘electrically inactive’ oxygen vacancies are structurally transformed under HTGB stress to form electrically ‘active’ switching oxide hole traps. The transients of this atomistic process were simulated with inputs from DFT. The calculated time-evolution of the buildup of positively charged vacancies correlated well with the experimentally measured time-dependence of HTGB-induced Vth instability. Moreover, this work designates near-interfacial single carbon interstitial defect in SiO2 as an additional switching oxide hole trap that could cause room-temperature Vth instability.
This work employs DFT-based molecular dynamics to develop device processing strategies that could mitigate reliability-limiting defects in 4H-SiC MOSFETs. It identifies Fluorine treatment to be effective in neutralizing oxygen vacancy and carbon-related hole traps, unlike molecular hydrogen. Similarly, Nitric Oxide passivation is found to eliminate carbon-related defects.
From device performance perspective, this dissertation proposes a methodology to identify and quantify channel mobility-limiting interfacial defects by integrating Drift-Diffusion simulations of 4H-SiC power MOSFET with DFT. It identifies the density of interface trap spectrum to be composed of three atomically distinct defects, one of which is potentially carbon di-interstitial defect.