|dc.description.abstract||This thesis explores fabrication methods and characterization of novel materials used in field effect transistors, including metallic nanowires, carbon nanotubes, and graphene.
Networks of conductive nanotubes are promising candidates for thin film electrode alternatives due to their desirable transparency, flexibility, and potential for large-scale processing. Silver nanowire and carbon nanotube networks are evaluated for their use as thin film electrode alternatives. Growth of silver nanowires in porous alumina membranes, dispersion onto a variety of substrates, and patterning is described. Metallic carbon nanotubes are suspended in aqueous solutions, airbrushed onto substrates, and patterned. The conductivity and transparency of both networks is evaluated against industry standards.
Graphene is a two dimensional gapless semimetal that demonstrates outstanding room temperature mobilities, optical transparency, mechanical strength, and sustains large current densities, all desirable properties for semiconductors used in field effect transistors. Graphene's low on/off ratio and low throughput fabrication techniques have yet to be overcome before it becomes commercially viable.
Silicon oxide substrates are common dielectrics in field effect transistors and instrumental in locating mechanically exfoliated graphene. The morphology of two different silicon oxides have been studied statistically with atomic force microscopy and scaling analysis. Tailoring the physical properties of these substrates may provide a control of graphene's electrical properties.
A silicon oxide substrate may also be chemically altered to control the properties of graphene. I have modified silicon oxide with self-assembled monolayers with various terminal groups to control the field near the graphene. I characterize the monolayers with atomic force microscopy, x-ray photospectroscopy, and contact angles. I characterize graphene on these substrates using Raman microscopy and transport measurements.
Finally, I examine low frequency noise in graphene field effect transistors on conventional silicon oxide substrates. As devices become smaller, the signal to noise ratio of these devices becomes important. Low frequency noise occurs on long time scales and must be controlled for device stability. I measure novel behavior of low frequency noise in multiple graphene devices. The noise may be described electron-hole puddles in the graphene that are caused by trapped charges near the surface of silicon oxide.||en_US