A. James Clark School of Engineering
Permanent URI for this communityhttp://hdl.handle.net/1903/1654
The collections in this community comprise faculty research works, as well as graduate theses and dissertations.
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Item Device and Circuit Level EMI Induced Vulnerability: Modeling and Experiments(2021) Cui, Yumeng; Goldsman, Neil; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Electro-magnetic interference (EMI) commonly exists in electronic equipment containing semiconductor-based integrated circuits (ICs). Metal-oxide-semiconductor field-effect-transistors (MOSFETs) in the ICs may be disrupted under EMI conditions due to transient voltage-current surges, and their internal states may change undesirably. In this work, the vulnerabilities of silicon MOSFETs under EMI are studied at the device and the circuit levels, categorized as non-permanent upsets (``Soft Errors'') and permanent damages (``Hard Failures''). The Soft Errors, such as temporary bit errors and waveform distortions, may happen or be intensified under EMI, as the transient disruptions activate unwanted and highly non-linear changes inside MOSFETs, such as Impact Ionization and Snapback. The system may be corrected from the erroneous state when the EMI condition is removed. We simulate planar silicon n-type MOSFETs at the device level to study the physical mechanisms leading to or complicate the short-term, signal-level Soft Errors. We experimentally tested commercially available MOSFET devices. Not included in regular MOSFET models, exponential-like current increases as the terminal voltage increases are observed and explained using the device-level knowledge. We develop a compact Soft Error model, compatible with circuit simulators using lumped (or compact-model) components and closed-form expressions, such as SPICE, and calibrate it with our in-house experimental data using an in-house extraction technique based on the Genetic Algorithm. Example circuits are simulated using the extracted device model and under EMI-induced transient disruptions. The EMI voltage-current disruptions may also lead to permanent Hard Failures that cannot be repaired without replacement. One type of Hard Failures, the MOSFET gate dielectric (or ``oxide'') breakdown, can result in input-output relation changes and additional thermal runaway. We have fabricated individual MOSFET devices at the FabLab at the University of Maryland NanoCenter. We experimentally stress-test the fabricated devices and observe the rapid, permanent oxide breakdown. Then, we simulate a nano-scale FinFET device with ultra-thin gate oxide at the device level. Then, we apply the knowledge from our experiments to the simulated FinFET, producing a gate oxide breakdown Hard Failure circuit model. The proposed workflow enables the evaluation of EMI-induced vulnerabilities in circuit simulations before actual fabrication and experiments, which can help the early-stage prototyping process and reduce the development time.Item Analysis and Mitigation of Electromagnetic Noise in Resonant Cavities and Apertures(2004-08-10) Li, Lin; Ramahi, Omar M; Mechanical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)The trend of low voltage in electronics circuits and boards makes them vulnerable to electromagnetic interference (EMI). Furthermore, higher speed (clock rate) leads to faster switching which increases the potential for higher radiation from circuits and boards. These inevitable trends collectively compromise the electromagnetic compatibility of electronic systems by increasing their electromagnetic susceptibility. In this work, radiation from enclosures and apertures is studies and characterized and radiation mitigation techniques are proposed. High-speed circuit radiation within an enclosure leads to cavity resonance that can have critical impact on other electronic components housed within the same enclosure. The amplified electric field in the enclosure can couple to critical circuits leading to either hard or soft failures. One measure to gauge the resonance of an enclosure is through the determination of S-parameters between certain ports connected to the enclosure. In this work, different numerical methods for efficient prediction of S-parameters are proposed and evaluated for their effectiveness and accuracy. Once an efficient procedure is established for calculating S-parameters, novel topological variations within the enclosure can be tested before manufacturing using accurate numerical prototyping. The proposed numerical S-parameters calculation algorithms are validated by comparison to laboratory measurements. Radiation from resonant apertures present in the walls of enclosures represents a second major source for radiation. In this work, a novel analysis of aperture radiation is presented based on the interpretation of the aperture as a transmission line. Once the transmission line analogy is established, a novel aperture resonance mitigation technique is proposed based on the use of material coating that mimics the behavior of matching loads that typically terminate transmission lines. The technique consists of adding resistive sheets in selected places in, or around the aperture. The effectiveness of the proposed method is demonstrated by first using numerical simulation of an aperture present in an infinite perfectly conducting sheet, and then by designing an experiment where the novel technique proposed here is tested on resonant apertures present in a metallic box. Both radiation measurements in an anechoic chamber and S-parameters measurements were conducted to test the validity of the proposed mitigation techniques.