Theses and Dissertations from UMD
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New submissions to the thesis/dissertation collections are added automatically as they are received from the Graduate School. Currently, the Graduate School deposits all theses and dissertations from a given semester after the official graduation date. This means that there may be up to a 4 month delay in the appearance of a give thesis/dissertation in DRUM
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Item PROGNOSTICS AND SECURE HEALTH MANAGEMENT OF ANALOG CIRCUITS(2022) Khemani, Varun; Pecht, Michael G; Azarian, Michael H; Reliability Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Analog circuits are a critical part of industrial circuits and systems. Estimates in the literature show that, even though analog circuits comprise less than 20% of all circuits, they are responsible for more than 80% of faults. Hence, analog circuit Prognosis and Health Management (PHM) is critical to the health of industrial circuits. There are a multitude of ways that any analog circuit can fail, which leads to proportional scaling in the number of possible fault classes with number of circuit components. Therefore, this research presents an advanced Design Of Experiments-based (DOE) approach to account for components that degrade in an individual and interacting fashion, to narrow down the number of possible fault classes under consideration. A wavelet-based deep-learning approach is developed that can localize the circuit component that is the source of degradation and predict the exact value of the degraded component. This degraded value is used in conjunction with degradation models to predict when the circuit will fail based on the source of degradation. Increasing outsourcing in the fabrication of electronic circuits has made them susceptible to the insertion of hardware trojans by untrusted foundries. In many cases, hardware trojans are more destructive than software trojans as they cannot be remedied by a software patch and are impossible to repair. Process reliability trojans are a new class of hardware trojans that are inserted through modification of fabrication parameters and accelerate the aging of circuit components. They are challenging to detect through traditional trojan detection methods as they have zero area footprint i.e., require no insertion of additional circuitry. The PHM approach is modified to detect these hardware trojans in order to incorporate circuit security, resulting in the Prognosis and Secure Health Management (PSHM) framework. Deep neural networks achieve state-of-the-art performance on classification and regression applications but are a black-box approach, which is a concern for implementation. Wavelets are approximations of cells found in the human visual cortex and cochlea. They were used to develop wavelet scattering networks (WSNs), which were intended to be an interpretable alternative to deep neural networks. WSNs achieve state-of-the-art performance on low to moderately complex datasets but are inferior to deep neural networks for extremely complex datasets. Improvements are made to WSNs to overcome their shortcomings in terms of performance and learnability. Further applications of the research are highlighted for rotating machinery vibration analytics, functional safety online estimation etc.Item Low Frequency Noise in CMOS transistors(2013) Sarje, Anshu; Peckerar, Martin; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)The minimum measurable signal strength of an electronic system is limited by noise. With the advent of very large scale integrated (VLSI) systems, low power designs are achieved by reducing the supply voltage and the drive current. This reduces the dynamic range of the system. As the signal in an amplifier system is usually set to be a significant fraction of the dynamic range, all other factors being equal, reduction in dynamic range leads to a degradation of the signal to noise ratio (SNR). This thesis addresses this issue in low power design. Focus is given to low frequency (< 1 kHz) noise. This frequency range is dominated by flicker noise, also referred to as pink or 1/f noise. Most biomedical and audio signals lie in this low frequency domain. For example, electrocardiograms (ECGs) record signals which are < 50 Hz. Audio signals have a large portion of signals that lie in the low frequency bandwidth. The focus here is on low-frequency performance of CMOS transistors. This represents a significant challenge in detection as noise in solid state devices tends to increase with decreases in frequency. That is, it becomes ``pink," weighted to the low frequency spectral range. Usually, we find that noise power changes reciprocally with frequency as we reach the kilohertz frequency range. While there has been no single, definitive theory of pink noise, system design principles can be formulated to minimize the impact of this noise. There are two factors to consider here. First, the pink noise process appears to be related to interaction with the defect structure of the solid through which charge is transported. As the number of defects is finite, there is a limit to the number of charges that can interact with this defect population. Thus, there is a limit on the amount of fluctuation in this interaction ``current." This limit depends on the number of defects present in the solid through which transport occurs. It also depends on the number of charges transported. Thus, the trivial and often cited optimization principle demanding a reduced solid defect density presents itself. This leads to a second, less obvious principle of optimization. If the number of transported charges is large, and the trap defect parameters (number density, cross-section, trap lifetime, etc.) does not depend on total current passed, it is possible to ``overcome" the defect-related noise. This is done by increasing the bias current. For fixed defect density, increased bias current will ``saturate" the 1/f-noise fluctuation at some level resulting in an increase in SNR. Large current leads to large power dissipation, an undesirable side-effect of saturating the 1/f-noise current. This problem of SNR and power optimization has been addressed in this work. The main contribution of the work is development of an analog design methodology utilizing saturation effect to improve system SNR through bias optimization. Flicker noise measurement was carried out for the low frequency region in 0.5um and 130 nm CMOS process and SNR studied under different gate bias voltages. We further investigated the impact of size variation, radiation stress and hot electron injection on the optimal bias point of the device. In addition, low temperature noise spectroscopy was conducted to study the noise behavior. Double channel method was used which enabled measurement of pink noise at very low gate biases. The work investigates signal, noise and power in deep-subthreshold region for the first time.