UMD Theses and Dissertations
Permanent URI for this collectionhttp://hdl.handle.net/1903/3
New submissions to the thesis/dissertation collections are added automatically as they are received from the Graduate School. Currently, the Graduate School deposits all theses and dissertations from a given semester after the official graduation date. This means that there may be up to a 4 month delay in the appearance of a given thesis/dissertation in DRUM.
More information is available at Theses and Dissertations at University of Maryland Libraries.
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Item Correlation of Signals, Noise, and Harmonics in Parallel Analog-to-Digital Converter Arrays(2009) Lauritzen, Keir Christian; Peckerar, Martin; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Combining M analog-to-digital converters (ADC) in parallel increases the maximum signal-to-noise ratio (SNR) by a factor of M, assuming the noise is uncorrelated from one channel to the next. This allows for a significant increase in SNR over a single ADC; however, noise and harmonic correlation degrade this improvement. ADCs have three sources of noise: thermal (and other random physical processes), sampling, and quantization noise. There are two system components creating harmonics: the sampler and the quantizer. In this thesis, I determine, analytically and experimentally, the degree of correlation between signals, noise, and harmonics in a parallel ADC array. To test the analysis experimentally, I developed a 16-channel test-bed using 16-bit, state-of-the-art ADCs and 16 direct-digital synthesizers as low-noise signal sources. The test bed provides excellent signal isolation between channels and minimal digital noise to enable the measurement of very low levels of correlation. I investigated the feasibility of measuring the very high levels of signal correlation in the presence of channel nonlinearities with different measurement signals. For a completely linear channel, the channel matching is limited by noise. With nonlinearities, the ability to measure the signal correlation depends on the measurement signal. I verified that the thermal noise is uncorrelated across 16 channels as expected. I also demonstrated that sampling noise is fully correlated from channel-to-channel when a common clock drives the ADCs. Efforts to reduce the correlation using two previously developed de-correlation techniques-phase randomization and frequency offsets-successfully reduced the correlated noise by a factor of two. I then demonstrated analytically and experimentally that harmonics from quantizers are largely uncorrelated; however, harmonics from the sampler are largely correlated confirming the need for decorrelation techniques. I demonstrated the impact of the previously developed decorrelation techniques to reduce harmonic correlation and developed two new decorrelation techniques: phase cancellation and clock offsets, which offer significant advantages over phase randomization and frequency offsets. Each technique offers different levels of dynamic range improvement and complexity, allowing for a range of techniques to target the optimal level of decorrelation.Item A Novel Compressing Analog-to-Digital Converter(2005-04-29) Lauritzen, Keir Christian; Peckerar, Martin C; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)Analog-to-digital converters form the backbone of many real world systems. A compression and expansion (companding) capability is a useful tool to increase the signal-to-noise ratio of many of these applications. Frequently, power-signal systems utilize analog compression to simplify signal processing. A novel compressing high-speed converter is presented in this thesis. The converter described here has a natural compressing transfer function of f(x)=1-1/x. The converter is a variation on Flash conversion, so it is high speed, with a sampling frequency of 80MHz. A four bit implementation of this converter was manufactured on a 0.5μm CMOS process with an area of 0.018mm2. The power consumed was 50mW on a first pass design. The compressing converter will to scale with process improvements. The converter desensitizes the linear region to reference mismatch, and arbitrary compressing transfer functions can be obtained.