The Block Distributed Memory Model
| dc.contributor.author | JaJa, Joseph | en_US |
| dc.contributor.author | Ryu, Kwan Woo | en_US |
| dc.date.accessioned | 2004-05-31T22:24:53Z | |
| dc.date.available | 2004-05-31T22:24:53Z | |
| dc.date.created | 1994-01 | en_US |
| dc.date.issued | 1998-10-15 | en_US |
| dc.description.abstract | We introduce a computation model for developing and analyzing parallel algorithms on distributed memory machines. The model allows the design of algorithms using a single address space and does not assume any particular interconnection topology. We capture performance by incorporating a cost measure for interprocessor communication induced by remote memory accesses. The cost measure includes parameters reflecting memory latency, communication bandwidth, and spatial locality. Our model allows the initial placement of the input data and pipelined prefetching. We use our model to develop parallel algorithms for various data rearrangement problems, load balancing, sorting, FFT, and matrix multiplication. We show that most of these algorithms achieve optimal or near optimal communication complexity while simultaneously guaranteeing an optimal speed-up in computational complexity. (Also cross-referenced as UMIACS-TR-94-5.) | en_US |
| dc.format.extent | 235589 bytes | |
| dc.format.mimetype | application/postscript | |
| dc.identifier.uri | http://hdl.handle.net/1903/612 | |
| dc.language.iso | en_US | |
| dc.relation.isAvailableAt | Digital Repository at the University of Maryland | en_US |
| dc.relation.isAvailableAt | University of Maryland (College Park, Md.) | en_US |
| dc.relation.isAvailableAt | Tech Reports in Computer Science and Engineering | en_US |
| dc.relation.isAvailableAt | UMIACS Technical Reports | en_US |
| dc.relation.ispartofseries | UM Computer Science Department; CS-TR-3207 | en_US |
| dc.relation.ispartofseries | UMIACS; UMIACS-TR-94-5. | en_US |
| dc.title | The Block Distributed Memory Model | en_US |
| dc.type | Technical Report | en_US |