Parameterized Looped Schedules
dc.contributor.author | Ko, Ming-Yung | |
dc.contributor.author | Zissulescu, Claudiu | |
dc.contributor.author | Puthenpurayil, Sebastian | |
dc.contributor.author | Nasr, Rami | |
dc.contributor.author | Bhattacharyya, Shuvra S. | |
dc.contributor.author | Kienhius, Bart | |
dc.contributor.author | Deprettere, Ed | |
dc.date.accessioned | 2006-01-13T19:45:06Z | |
dc.date.available | 2006-01-13T19:45:06Z | |
dc.date.issued | 2006-01-13T19:45:06Z | |
dc.description.abstract | This paper is concerned with the compact representation of execution sequences in terms of efficient looping constructs. Here, by a looping construct we mean a compact way of specifying a finite repetition of a set of execution primitives (“instructions”). Such compaction, which can be viewed as a form of hierarchical run-length encoding, has application in many embedded software contexts, including efficient control generation for Kahn processes, and software synthesis for static dataflow models of computation, such as synchronous dataflow and cyclo-static dataflow. In this paper, we significantly generalize previous models for loop-based code compaction of DSP programs to yield a configurable code compression methodology that exhibits a broad range of achievable trade-offs. Specifically, we formally develop and apply to DSP hardware and software implementation a parameterizable loop scheduling approach with compact format, dynamic reconfigurability, and low overhead decompression. | en |
dc.format.extent | 227817 bytes | |
dc.format.mimetype | application/pdf | |
dc.identifier.uri | http://hdl.handle.net/1903/3033 | |
dc.language.iso | en_US | en |
dc.relation.ispartofseries | UM Computer Science Department | en |
dc.relation.ispartofseries | CS-TR-4702 | en |
dc.relation.ispartofseries | UMIACS | en |
dc.relation.ispartofseries | UMIACS-TR-2005-10 | en |
dc.title | Parameterized Looped Schedules | en |
dc.type | Technical Report | en |
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