Theses and Dissertations from UMD

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New submissions to the thesis/dissertation collections are added automatically as they are received from the Graduate School. Currently, the Graduate School deposits all theses and dissertations from a given semester after the official graduation date. This means that there may be up to a 4 month delay in the appearance of a give thesis/dissertation in DRUM

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    ATOMIC LAYER DEPOSITION OF CADMIUM TELLURIDE FOR THE PASSIVATION OF MERCURY CADMIUM TELLURIDE
    (2021) Pattison, James William; Salamanca-Riba, Lourdes G; VanMil, Brenda; Material Science and Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)
    Mercury cadmium telluride (MCT) is an important infrared (IR) detector material due to high quantum efficiency and the ability to tune the bandgap, covering important IR wavelengths from near-infrared (~1 m) to very-long wavelength infrared (>12 m) detection. Focal Plane Arrays (FPAs) are used to image in the infrared and consist of photodiodes that absorb IR photons, generating charge carriers that create an electric signal used to form an image by combining the signals from all of the photodiodes. Decreasing photodiode size increases the resolution of optical systems incorporating MCT FPAs, but challenges current state-of-the-art passivation processes. Passivation is needed to increase the signal-to-noise of a system by rendering benign the charge carrier transport. Physical-vapor-deposited (PVD) CdTe is the incumbent passivation material for MCT, but fails when applied to the next generation of MCT photodiodes because of non-conformal deposition. Atomic layer deposition (ALD) is a superior deposition technique in this regard because the vapor-phase chemicals enable conformal exposure of the surface as opposed to line-of-sight deposition in PVD. ALD of CdTe requires deposition temperature lowering to suppress out-gassing of Hg at elevated temperature, which leads to mercury vacancy formation, reducing signal-to-noise of any eventual detector. Previous demonstration of CdTe ALD was spontaneous above ~200 °C for chemisorbed dimethylcadmium (DMCd) to react with diethyltellurium (DETe). However, this temperature is incompatible with MCT devices, because of the loss of Hg from the material. This dissertation attempts to overcome the low temperature requirement of current CdTe ALD using a novel approach in which argon plasma successfully decomposes the chemisorbed DMCd, replacing temperature induced thermal decomposition, and induced CdTe growth using either DETe or bis(trimethylsilyl)telluride as the tellurium precursors at low temperatures. Film deposition conditions were developed through deposition on silicon substrates, and the process was transferred to MCT samples, demonstrating low temperature deposition, conformal deposition, and passivation of the MCT surface. The films were characterized by in situ spectroscopic ellipsometry (SE), x-ray photoelectron spectroscopy (XPS), x ray diffraction (XRD), and transmission electron microscopy (TEM). Photoconductive decay (PCD) measurements were made of MCT material passivated by CdTe ALD, demonstrating effective passivation through enhanced minority carrier lifetime.
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    INTEGRATED MODELING OF RELIABILITY AND PERFORMANCE OF 4H-SILICON CARBIDE POWER MOSFETS USING ATOMISTIC AND DEVICE SIMULATIONS
    (2015) Perinthatta Ettisserry, Devanarayanan; Goldsman, Neil; Electrical Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)
    4H-Silicon Carbide (4H-SiC) power MOSFET is a promising technology for future high-temperature and high-power electronics. However, poor device reliability and performance, that stem from the inferior quality of 4H-SiC/SiO2 interface, have hindered its development. This dissertation investigates the role of interfacial and near-interfacial atomic defects as the root cause of these key concerns. Additionally, it explores device processing strategies for mitigating reliability-limiting defects. In order to understand the atomic nature of material defects, and their manifestations in electrical measurements, this work employs an integrated modeling approach together with experiments. Here, the electronic and structural properties of defects are analyzed using first-principles hybrid Density Functional Theory (DFT). The insights from first-principles calculations are integrated with conventional physics-based modeling techniques like Drift-Diffusion and Rate equation simulations to model various device characteristics. Subsequently, the atomic-level models are validated by comparison with experiments. From device reliability perspective, this dissertation models the time-dependent worsening of threshold voltage (Vth) instability in 4H-SiC MOSFETs operated under High-Temperature and Gate-Bias (HTGB) conditions. It proposes a DFT-based oxygen-vacancy hole trap activation model, where certain originally ‘electrically inactive’ oxygen vacancies are structurally transformed under HTGB stress to form electrically ‘active’ switching oxide hole traps. The transients of this atomistic process were simulated with inputs from DFT. The calculated time-evolution of the buildup of positively charged vacancies correlated well with the experimentally measured time-dependence of HTGB-induced Vth instability. Moreover, this work designates near-interfacial single carbon interstitial defect in SiO2 as an additional switching oxide hole trap that could cause room-temperature Vth instability. This work employs DFT-based molecular dynamics to develop device processing strategies that could mitigate reliability-limiting defects in 4H-SiC MOSFETs. It identifies Fluorine treatment to be effective in neutralizing oxygen vacancy and carbon-related hole traps, unlike molecular hydrogen. Similarly, Nitric Oxide passivation is found to eliminate carbon-related defects. From device performance perspective, this dissertation proposes a methodology to identify and quantify channel mobility-limiting interfacial defects by integrating Drift-Diffusion simulations of 4H-SiC power MOSFET with DFT. It identifies the density of interface trap spectrum to be composed of three atomically distinct defects, one of which is potentially carbon di-interstitial defect.
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    Electronic Structure of SiC/SiO2 by Density Functional Theory
    (2012) Salemi, Shahrzad; Goldsman, Neil; Reliability Engineering; Digital Repository at the University of Maryland; University of Maryland (College Park, Md.)
    Silicon carbide (SiC) is a promising semiconductor material with desirable properties for many applications. SiC-based electronic devices and circuits are being developed for use in high-temperature, high-power, and high-radiation conditions under which conventional semiconductors cannot function. Additionally, it has the advantage of growing a native oxide, SiO2, by simple thermal oxidation. Despite all desirable properties, SiC-based devices still face major challenges. The main problem of SiC-based devices is the great density of imperfections at the SiC/SiO2 interface, which not only degrades the device performance but also causes reliability problems coming from the extreme operating conditions. The quality of the interface affects the channel mobility of MOSFETs, which is the most critical parameter of devices. In this work a hybrid functional density functional theory framework is employed to model the (0001)4H-SiC/SiO2 abrupt interface. Using this, defect energy levels in the bandgap have been calculated through the total and projected density of states. There is experimental evidence for improvement of the quality of the interface after passivation, However the atomic mechanisms of the improvement are not yet clear., Thus, the impact of various passivations on the potential defects has also been studied. Since the interface of SiC/SiO2 is not perfectly abrupt, several atomic configurations for (0001)4H-SiC/SiO2 transition layers have also been modeled, and their effect on the bandgap, and the near interface trap density has been studied. A DFT-based Monte Carlo carrier transport simulation technique is employed to compute the average velocities, phonon-limited and ionized-impurity-limited mobilities of the most probable transition layer structures. Finally, since low frequency noise calculation is a powerful tool to diagnose quality and reliability of semiconductor devices, a DFT-based method is presented to calculate the current spectral noise density of the (0001)4H-SiC/SiO2 transition layers.