Cochlear Filters Design Using a Parallel Dilating-Biquad Switched-Capacitor Filter Bank
| dc.contributor.author | Lin, Jyhfong | en_US |
| dc.contributor.author | Ki, Wing-Hung | en_US |
| dc.contributor.author | Thompson, K.E. | en_US |
| dc.contributor.author | Shamma, S. | en_US |
| dc.contributor.department | ISR | en_US |
| dc.date.accessioned | 2007-05-23T09:48:41Z | |
| dc.date.available | 2007-05-23T09:48:41Z | |
| dc.date.issued | 1991 | en_US |
| dc.description.abstract | A parallel filter bank is proposed to implement cochlear filters using very large time-constant (VLT) switched-capacitor (SC) filters. Significant hardware reduction is achieved in three ways. First, VLT SC biquads are used where the capacitor spread ratio of each biquad is about inversely proportional to the square root of wT, w is the center frequency of the filter and T is the inverse of the sampling frequency of the biquad. Second, the number of biquads is reduced by biquad sharing where n-biquad per channel cochlear filters are realized with only one additional biquad per channel after the first channel. Finally, LPN-type filter is used to avoid the very small capacitor in the forward path of each biquad. Furthermore, this filter bank s not only parasitics-insensitive but also gain-and-offset compensated using biphase clocking. | en_US |
| dc.format.extent | 268232 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/1903/5133 | |
| dc.language.iso | en_US | en_US |
| dc.relation.ispartofseries | ISR; TR 1991-86 | en_US |
| dc.subject | filtering | en_US |
| dc.subject | speech processing | en_US |
| dc.subject | parallel architectures | en_US |
| dc.subject | Communication | en_US |
| dc.subject | Signal Processing Systems | en_US |
| dc.title | Cochlear Filters Design Using a Parallel Dilating-Biquad Switched-Capacitor Filter Bank | en_US |
| dc.type | Technical Report | en_US |
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