Browsing by Author "Tang, C.F.T."
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Item Adaptive Array Systems Using QR-Based RLS and CRLS Techniques with Systolic Array Architectures(1991) Tang, C.F.T.; Tretter, S.A.; ISRIn this dissertation the basic techniques for designing more sophisticated adaptive array systems are first developed. Then several systolic architectures based on numerically stable and computationally efficient algorithms are proposed for adaptive array systems. Compared to the existing architectures proposed elsewhere in the literature, our new systolic architectures are more efficient structures for real-time signal processing applications and VLSI hardware implementation. The reasons are (1) the proposed systolic architectures are based on numerically stable and computationally efficient systolic algorithms, (2) there is no bottleneck in the whole architecture since QR decomposition by the square root free fast Givens method is used, (3) the whole architecture has a fully pipelined design since backward substitution is avoided, (4) it is a single fully pipelined open-loop system without any feedback arrangement, and (5) the systolic architectures function recursively to update the result for each new snapshot. Therefore, the new VLSI systolic architectures proposed in this dissertation using QR-recursive least squares (QR-RLS) and QR-constrained recursive least squares (QR-CRLS) techniques archieve minimal memory and maximal parallelism for real-time signal processing applications and VLSI hardware implementation.Item A Fully Parallel and Pipelined Systolic Array for MVDR Beamforming(1991) Tang, C.F.T.; Liu, K.J. Ray; ISRA fully-pipelined systolic array for computing the minimum variance distortionless response (MVDR) was first proposed by McWhirter and Shepherd. The fundamental concept is to fit the MVDR beamforming to the non-contrainted recursive least-squares (RLS) minimization. Until now, their systolic array processor is well-recognized as the most efficient design for MVDR beamforming. In this paper, we first point out the mistake by relating the MVRD beamforming and RLS minimization and then propose a new algorithm for the MVDR beamforming. Moreover, a fully parallel and pipelined systolic array for the newly proposed algorithm is presented and the square-root free implementation is also considered.Item Parallel and Fully-Pinelined Instantaneous Optimal Weight Extraction for Adaptive Beamforming Using Systolic Arrays(1991) Tang, C.F.T.; Liu, K.J. Ray; Tretter, S.A.; ISRIn this paper we present systolic algorithms and architectures for parallel and fully-pipelined instantaneous optimal weight extraction for multiple sidelobe canceller (MSC) and minimum variance distortionless response (MVDR) beamformer. The proposed systolic parallelogram array processors are parallel and fully pipelined, and they can extract the optimal weights instantaneously without the need for forward or backward substitution. We also show that the square-root-free Givens method can be easily incorporated to improve the throughput rate and speed up the system. As a result, these MSC and MVDR systolic array weight extraction systems are suitable for real- time VLSI implementation in practical radar/sonar systems.Item VLSI Algorithms and Architectures for Complex Householder Transformation with Applications to Array Processing(1991) Tang, C.F.T.; Liu, K.J. Ray; Hsieh, S.F.; Yao, K.; ISRThe Householder transformation is considered to be desirable among various unitary transformations due to its superior computational efficiency and robust numerical stability. Specifically, the Householder transformation outperforms the Givens rotation and the modified Gram-Schmidt methods in numerical stability under finite-precision implementations, as well as requiring fewer arithmetical operations. Consequently, the QR decomposition based on the Householder transformation is promising for VLSI implementation and real-time high throughput modern signal processing. In this paper, a recursive complex Householder transformation with a fast initialization algorithm is proposed and its associated parallel/pipelined architecture is also considered. Then, a complex Householder transformation based recursive least-squares algorithm with a fast initialization is presented. Its associated systolic array processing architecture is also considered.