In today’s world, sending a design to a third party foundry for fabrication poses aserious threat to one’s intellectual property. To keep designs safe from adversaries, design obfuscation techniques have been developed to protect the IP details of the design. This thesis explains how the previously considered secure algorithm, TimingCamouflage+, can be thwarted and the original circuit can be recovered [1]. By removing wave-pipelining false paths, the TimingCamouflage+ algorithm is reduced to the unsecure TimingCamouflage algorithm [2]. Since the TimingCamouflage algorithm is vulnerable to the TimingSAT attack, this reduction proves that TimingCamouflage+ is also vulnerable to TimingSAT and not a secure camouflaging technique [3]. This thesis describes how wave-pipelining paths can be removed, and this method of handling false paths is tested on various ISCAS89 benchmarks and shown to be both functionally correct and feasible in complexity.