VLSI Design IP Protection: Solutions, New Challenges, and Opportunities
| dc.contributor.author | Yuan, Lin | |
| dc.contributor.author | Qu, Gang | |
| dc.date.accessioned | 2009-05-11T13:53:13Z | |
| dc.date.available | 2009-05-11T13:53:13Z | |
| dc.date.issued | 2006-06 | |
| dc.description.abstract | It has been a decade since the need of VLSI design intellectual property (IP) protection was identified [1,2]. The goals of IP protection are 1) to enable IP providers to protect their IPs against unauthorized use, 2) to protect all types of design data used to produce and deliver IPs, 3) to detect the use of IPs, and 4) to trace the use of IPs [3]. There are significant advances from both industry and academic towards these goals. However, do we have solutions to achieve all these goals? What are the current state-of-the-art IP protection techniques? Do they meet the protection requirement designers sought for? What are the (new) challenges and is there any feasible answer to them in the foreseeable future? This paper addresses these questions and provides possible solutions mainly from academia point of view. Several successful industry practice and ongoing efforts are also discussed briefly. | en |
| dc.format.extent | 277548 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.citation | L. Yuan, G. Qu, L. Ghout, and A. Bouridane. "VLSI Design IP Protection: Solutions, New Challenges, and Opportunities," First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06), pp. 469 - 476, June 2006. | en |
| dc.identifier.uri | http://hdl.handle.net/1903/9063 | |
| dc.language.iso | en_US | en |
| dc.publisher | IEEE | en |
| dc.relation.isAvailableAt | A. James Clark School of Engineering | en_us |
| dc.relation.isAvailableAt | Electrical & Computer Engineering | en_us |
| dc.relation.isAvailableAt | Digital Repository at the University of Maryland | en_us |
| dc.relation.isAvailableAt | University of Maryland (College Park, MD) | en_us |
| dc.rights.license | Copyright © 2006 IEEE. Reprinted from First NASA/ESA Conference on Adaptive hardware and Systems. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Maryland's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it. | |
| dc.subject | VLSI | en |
| dc.subject | intellectual property | en |
| dc.title | VLSI Design IP Protection: Solutions, New Challenges, and Opportunities | en |
| dc.type | Article | en |
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