Novel Approach and Methods for Optimizing Highly Sensitive Low Noise Amplifier CMOS IC Design for Congested RF Environments

Abstract

This work details the optimization and evaluation of a CMOS low-noise amplifier by developing a new algorithm for the 𝑔𝑚/𝐼𝐷 approach and combining with a modified figure of merit index method. The amplifier includes on-chip matching elements (such as IC inductors) for resonance at the targeted frequencies. The simulation results of the optimized LNA model showed scattering parameter 𝑆21 = 19.91 dB, noise figure NF = 3.54 dB and excellent linearity for third-order intermodulation parameter IIP3 = 5.89 dBm for the targeted frequency of 𝑓0 = 2.4 GHz.