High-Performance DRAMs in Workstation Environments
| dc.contributor.author | Cuppu, Vinodh | |
| dc.contributor.author | Jacob, Bruce | |
| dc.contributor.author | Davis, Brian | |
| dc.contributor.author | Mudge, Trevor | |
| dc.date.accessioned | 2007-11-08T18:44:53Z | |
| dc.date.available | 2007-11-08T18:44:53Z | |
| dc.date.issued | 2001-10 | |
| dc.description.abstract | This paper presents a simulation-based performance study of several of the new high-performance DRAM architectures, each evaluated in a small system organization. These small-system organizations correspond to workstation-class computers and use only a handful of DRAM chips (~10, as opposed to ~1 or ~100). The study covers Fast Page Mode, Extended Data Out, Synchronous, Enhanced Synchronous, Double Data Rate, Synchronous Link, Rambus, and Direct Rambus designs. Our simulations reveal several things: (a) current advanced DRAM technologies are attacking the memory bandwidth problem but not the latency problem; (b) bus transmission speed will soon become a primary factor limiting memory-system performance; (c) the post-L2 address stream still contains significant locality, though it varies from application to application; (d) systems without L2 caches are feasible for low- and medium-speed CPUs (1GHz and below); and (e) as we move to wider buses, row access time becomes more prominent, making it important to investigate techniques to exploit the available locality to decrease access time. | en |
| dc.format.extent | 816048 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.citation | "High performance DRAMs in workstation environments." Vinodh Cuppu, Bruce Jacob, Brian Davis, and Trevor Mudge. IEEE Transactions on Computers, vol. 50, no. 11, pp. 1133-1153. November 2001. (TC Special Issue on High-Performance Memory Systems) | en |
| dc.identifier.uri | http://hdl.handle.net/1903/7456 | |
| dc.language.iso | en_US | en |
| dc.relation.isAvailableAt | A. James Clark School of Engineering | en_us |
| dc.relation.isAvailableAt | Electrical & Computer Engineering | en_us |
| dc.relation.isAvailableAt | Digital Repository at the University of Maryland | en_us |
| dc.relation.isAvailableAt | University of Maryland (College Park, MD) | en_us |
| dc.subject | DRAM architectures | en |
| dc.subject | DRAM performance | en |
| dc.subject | DRAM systems | en |
| dc.subject | system modeling | en |
| dc.subject | DDR DRAM | en |
| dc.subject | Direct Rambus DRAM | en |
| dc.subject | PC100 SDRAM | en |
| dc.subject | DDR2 DRAM | en |
| dc.title | High-Performance DRAMs in Workstation Environments | en |
| dc.type | Article | en |