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Effective Iterative Techniques for Fingerprinting Design IP

dc.contributor.authorCaldwell, Andrew E.
dc.contributor.authorChoi, Hyun-Jin
dc.contributor.authorKahng, Andrew B.
dc.contributor.authorMantik, Stefanus
dc.contributor.authorPotkonjak, Miodrag
dc.contributor.authorQu, Gang
dc.contributor.authorWong, Jennifer L.
dc.identifier.citationA.E. Caldwell, H. Choi, A.B. Kahng, S. Mantik, M. Potkonjak, G. Qu, J.L. Wong. "Effective Iterative Techniques for Fingerprinting Design IP," 36th ACM/IEEE Design Automation Conference Proceedings, pp. 843 -848, June 1999.en
dc.description.abstractWhile previous watermarking-based approaches to intellectual property protection (IPP) have asymmetrically emphasized the IP provider’s rights, the true goal of IPP is to ensure the rights of both the IP provider and the IP buyer. Symmetric fingerprinting schemes have been widely and effectively used to achieve this goal; however, their application domain has been restricted only to static artifacts, such as image and audio. In this paper, we propose the first generic symmetric fingerprinting technique which can be applied to an arbitrary optimization/synthesis problem and, therefore, to hardware and software intellectual property. The key idea is to apply iterative optimization in an incremental fashion to solve a fingerprinted instance; this leverages the optimization effort already spent in obtaining a previous solution, yet generates a uniquely fingerprinted new solution. We use this approach as the basis for developing specific fingerprinting techniques for four important problems in VLSI CAD: partitioning, graph coloring, satisfiability, and standard-cell placement. We demonstrate the effectiveness of our fingerprinting techniques on a number of standard benchmarks for these tasks. Our approach provides an effective tradeoff between runtime and resilience against collusion.en
dc.format.extent104396 bytes
dc.subjectintellectual property protection (IPP)en
dc.titleEffective Iterative Techniques for Fingerprinting Design IPen
dc.relation.isAvailableAtA. James Clark School of Engineeringen_us
dc.relation.isAvailableAtElectrical & Computer Engineeringen_us
dc.relation.isAvailableAtDigital Repository at the University of Marylanden_us
dc.relation.isAvailableAtUniversity of Maryland (College Park, MD)en_us
dc.rights.licenseCopyright © 1999 IEEE. Reprinted from IEEE/ACM Design Automation Conference Proceedings. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Maryland's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to By choosing to view this document, you agree to all provisions of the copyright laws protecting it.

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