Low Noise Pre-amplifier/Amplifier Chain for High Capacitance Sensors

Abstract

In the past two decades, imaging sensors and detectors have developed tremendously. This technology has found its way into a number of areas, such as space missions, synchrotron light sources, and medical imaging. Nowadays, detectors and custom ICs are routine in high-energy physics applications. Electronic readout circuits have become a key part of every modern detector system. Many sensing circuits in detectors depend upon accumulating charge on a capacitor. The charge uncertainty on the capacitor when it is reset causes a signal error known as reset noise. Therefore, low noise readout circuitry capable of driving high input capacitance is essential for detector systems.

A low noise pre-amplifier/amplifier readout circuitry has been designed and fabricated in 0.13um IBM CMOS8RF process technology. The pre-amplifier/ amplifier chain employs correlated double sampling at the input to suppress the kTC noise without any additional circuitry. In order to increase the signal-to-noise ratio, capacitive matching is used at the amplifier input. The experimental results of the signal processing chain employing capacitive matching and correlated double sampling show more than 60 times improvement in the signal-to-noise ratio over the same circuit without these improvements.

In this dissertation a novel auto-zeroing technique is introduced as well. This technique uses a nulling point other than the amplifier's input and output to perform the auto-zeroing operation. The auto-zeroing is performed by taking advantage of emitter degeneration in the input transistor pair of the differential pair. For testing purposes this technique is implemented on a telescopic cascode differential amplifier. The auto-zeroed telescopic cascode differential amplifier has also been designed and fabricated in 0.13um IBM CMOS8RF process technology. This auto-zeroing technique reduces the input referred offset noise by an order of magnitude.