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Finite Buffer Realization of Input-Output Discrete Event Systems

dc.contributor.authorKumar, Ratneshen_US
dc.contributor.authorGarg, Vijay K.en_US
dc.contributor.authorMarcus, Steven I.en_US
dc.date.accessioned2007-05-23T09:56:02Z
dc.date.available2007-05-23T09:56:02Z
dc.date.issued1994en_US
dc.identifier.urihttp://hdl.handle.net/1903/5484
dc.description.abstractMany discrete event systems (DESs) such as manufacturing systems, data base management systems, communication networks, traffic systems, etc., can be modeled as input-output discrete event systems (I/O DESs). In this paper we formulate and study the problem of stable realization of such systems in the logical setting. Given an input and an output language describing the sequences of events that occur at the input and the output, respectively, of an I/O DES, we study whether it is possible to realize the system as a unit consisting of a given set of buffers of finite capacity, called a dispatching unit. The notions of stable, conditionally stable, dispatchable and conditionally dispatchable units are introduced as existence of stable (or input-output bounded), and causal (or prefix preserving) input- output maps, and effectively computable necessary and sufficient conditions for testing them are obtained.en_US
dc.format.extent138575 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_USen_US
dc.relation.ispartofseriesISR; TR 1994-2en_US
dc.subjectdiscrete event dynamical systems en_US
dc.subjectflexible manufacturingen_US
dc.subjectSystems Integration Methodologyen_US
dc.titleFinite Buffer Realization of Input-Output Discrete Event Systemsen_US
dc.typeTechnical Reporten_US
dc.contributor.departmentISRen_US


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