Now showing items 1-4 of 4
Dynamic Range, Stability, and Fault-tolerant Capability of Finite-precision RLS Systolic Array Based on Givens Rotations
The QRD RLS algorithm is generally recognized as having good numerical properties under finite-precision implementation. Also, it is very suitable for VLSI implementation since it can be easily mapped onto a systolic array. ...
VLSI Implementation of a Tree Searched Vector Quantizer
The VLSI design and implementation of a Tree Searched Vector Quantizer is presented. The number of processors needed is equal to the depth of the tree. All processors are identical and data flow between processors is ...
VLSI Architectures for Real-Time Signal Processing
Many real-time signal processing tasks require the ability to process very large amounts of data at very high throughput rates. In this report we present efficient special-purpose VLSI architectures for computing several ...
Systolic Block Householder Transformation for RLS Algorithm with Two-level Pipelined Implementation
The QRD RLS algorithm is one of the most promising RLS algorithms, due to its robust numerical stability and suitability for VLSI implementation based on a systolic array architecture. Up to now, among many techniques to ...