The detailed theoretical analysis of very large time-constant (VLT) integrators which use either charge elimination (T-cell and Huang's integrators) or charge cancellation (Nagaraj's and charge-differencing integrators) and described. Using a new area- efficient design, the charge-differencing (CD) integrator, the capacitance spread ratio can be easily reduced to less than the reciprocal of the square root of the product of the pole frequency and the sampling period. Non-ideal effects of op-amp like finite DC gain and offset voltage can also be compensated by employing offset storing capacitor operating only with the bi- phase clocking scheme.