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    <title>DRUM Community: College of Computer, Mathematical &amp; Natural Sciences</title>
    <link>http://hdl.handle.net/1903/12</link>
    <description />
    <pubDate>Wed, 22 May 2013 21:09:58 GMT</pubDate>
    <dc:date>2013-05-22T21:09:58Z</dc:date>
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      <title>XMTSim: A Simulator of the XMT Many-core Architecture</title>
      <link>http://hdl.handle.net/1903/13893</link>
      <description>Title: XMTSim: A Simulator of the XMT Many-core Architecture
Authors: Keceli, Fuat; Vishkin, Uzi
Abstract: This paper documents the features and the design of XMTSim, the cycle-accurate simulator of the Explicit Multi-Threading&#xD;
(XMT) computer architecture. The Explicit Multi-Threading (XMT) is a general-purpose many-core computing platform,&#xD;
with the vision of a 1000-core chip that is easy to program but does not compromise on performance. XMTSim is a primary&#xD;
component in its publicly available toolchain along with an optimizing compiler. Research and experimentation enabled by&#xD;
the toolchain played a central role in supporting the ease-of-programming and performance aspects of the XMT architecture.&#xD;
The compiler and the simulator are also important milestones for an efficient programmer's workflow from PRAM algorithms&#xD;
to programs that run on the shared memory XMT hardware. This workflow is a key component in accomplishing the goal of&#xD;
ease-of-programming and performance.&#xD;
The applicability of the XMT simulator extends beyond specific XMT choices. It can be used to explore the much greater&#xD;
design space of shared memory many-cores by system researchers or by programmers. As the toolchain can practically run on&#xD;
any computer, it provides a supportive environment for teaching parallel algorithmic thinking with a programming component.</description>
      <pubDate>Sat, 01 Jan 2011 00:00:00 GMT</pubDate>
      <guid isPermaLink="false">http://hdl.handle.net/1903/13893</guid>
      <dc:date>2011-01-01T00:00:00Z</dc:date>
    </item>
    <item>
      <title>Empirical Speedup Study of Truly Parallel Data Compression</title>
      <link>http://hdl.handle.net/1903/13890</link>
      <description>Title: Empirical Speedup Study of Truly Parallel Data Compression
Authors: Edwards, James A.; Vishkin, Uzi
Abstract: We present an empirical study of novel work-optimal parallel&#xD;
algorithms for Burrows-Wheeler compression and decompression&#xD;
of strings over a constant alphabet. To validate&#xD;
these theoretical algorithms, we implement them on the experimental&#xD;
XMT computing platform developed especially&#xD;
for supporting parallel algorithms at the University of Maryland.&#xD;
We show speedups of up to 25x for compression, and&#xD;
13x for decompression, versus bzip2, the de facto standard&#xD;
implementation of Burrows-Wheeler compression. Unlike&#xD;
existing approaches, which assign an entire (e.g., 900KB)&#xD;
block to a processor that processes the block serially, our&#xD;
approach is “truly parallel” as it processes in parallel the&#xD;
entire input. Besides the theoretical interest in solving the&#xD;
“right” problem, the importance of data compression speed&#xD;
for small inputs even at great expense of quality (compressed&#xD;
size of data) is demonstrated by the introduction of Google’s&#xD;
Snappy for MapReduce. Perhaps surprisingly, we show feasibility&#xD;
of holding on to quality, while even beating Snappy&#xD;
on speed.&#xD;
In turn, this work adds new evidence in support of the&#xD;
XMT/PRAM thesis: that an XMT-like many-core hardware/&#xD;
software platform may be necessary for enabling general-purpose&#xD;
parallel computing. Comparison of our results to recently&#xD;
published work suggests 70x improvement over what&#xD;
current commercial parallel hardware can achieve.</description>
      <pubDate>Sat, 20 Apr 2013 00:00:00 GMT</pubDate>
      <guid isPermaLink="false">http://hdl.handle.net/1903/13890</guid>
      <dc:date>2013-04-20T00:00:00Z</dc:date>
    </item>
    <item>
      <title>Morphology in Urbanized Streams of the Puget Sound Lowland Region</title>
      <link>http://hdl.handle.net/1903/13870</link>
      <description>Title: Morphology in Urbanized Streams of the Puget Sound Lowland Region
Authors: Boyle, Pamela
Abstract: The purpose of this research is to evaluate the effects of urbanization on channel morphology.  Three hypotheses are tested:  1)  Channel morphology measured from one cross section is not similar to reach-averaged values, 2)  Channel shear stress ratios and erosivity increase with urbanization, and 3) Channel morphological complexity decreases with urbanization increases.  Results indicate that single cross-section data do not adequately describe channel morphology.  Shear stress and bed mobility did not increase with urbanization, perhaps due to the presence of large bed grain sizes that adjust to increases in flow.  Similarly, channel complexity did not decrease with increased urbanization.  These data indicate that channel changes resulting from urbanization are influenced by sediment supply as well as discharge, and that this should be taken into consideration in restoration design.</description>
      <pubDate>Thu, 01 Jan 2004 00:00:00 GMT</pubDate>
      <guid isPermaLink="false">http://hdl.handle.net/1903/13870</guid>
      <dc:date>2004-01-01T00:00:00Z</dc:date>
    </item>
    <item>
      <title>ONTOLOGY-ENABLED TRACEABILITY MODELS FOR ENGINEERING SYSTEMS DESIGN AND MANAGEMENT</title>
      <link>http://hdl.handle.net/1903/13864</link>
      <description>Title: ONTOLOGY-ENABLED TRACEABILITY MODELS FOR ENGINEERING SYSTEMS DESIGN AND MANAGEMENT
Authors: Delgoshaei, Parastoo
Abstract: This thesis describes new models and a system for satisfying requirements, and an architectural framework for linking discipline-specific dependencies through inter- action relationships at the ontology (or meta-model) level. In a departure from state-of-the-art traceability mechanisms, we ask the question: What design concept (or family of design concepts) should be applied to satisfy this requirement? Solu- tions to this question establish links between requirements and design concepts. The implementation of these concepts leads to the design itself. These ideas, and support for design-rule checking are prototyped through a series of progressively complicated applications, culminating in a case study for rail transit systems management.</description>
      <pubDate>Sun, 01 Jan 2012 00:00:00 GMT</pubDate>
      <guid isPermaLink="false">http://hdl.handle.net/1903/13864</guid>
      <dc:date>2012-01-01T00:00:00Z</dc:date>
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