Now showing items 1-20 of 38

    • Algorithmic Composition as a Model of Creativity 

      Jacob, Bruce (1996-12)
      ““’There are two distinct types of creativity: the flash out of the blue (inspiration? genius?), and the process of incremental revisions (hard work). Not only are we years away from modeling the former, we do not even ...
    • An Analytical Model for Designing Memory Hierarchies 

      Jacob, Bruce; Chen, Peter M.; Silverman, Seth R.; Mudge, Trevor N. (1996-10)
      Memory hierarchies have long been studied by many means: system building, trace-driven simulation, and mathematical analysis. Yet little help is available for the system designer wishing to quickly size the different ...
    • BioBench: A Benchmark Suite of Bioinformatics Applications 

      Albayraktaroglu, Kursad; Jaleel, Aamer; Wu, Xue; Franklin, Manoj; Jacob, Bruce; Tseng, Chau-Wen; Yeung, Donald (2005-03)
      Recent advances in bioinformatics and the significant increase in computational power available to researchers have made it possible to make better use of the vast amounts of genetic data that has been collected over the ...
    • Cache Design for Embedded Real-Time Systems 

      Jacob, Bruce (1999-06-30)
      Caches have long been a mechanism for speeding memory access and are popular in embedded hardware architectures from microcontrollers to core-based ASIC designs. However, caches are considered ill-suited for embedded ...
    • A Case for Studying DRAM Issues at the System Level 

      Jacob, Bruce (IEEE Micro, 2003-08)
      THE WIDENING GAP BETWEEN TODAY’S PROCESSOR AND MEMORY SPEEDS MAKES DRAM SUBSYSTEM DESIGN AN INCREASINGLY IMPORTANT PART OF COMPUTER SYSTEM DESIGN. IF THE DRAM RESEARCH COMMUNITY WOULD FOLLOW THE MICROPROCESSOR COMMUNITY’S ...
    • Composing With Genetic Algorithms 

      Jacob, Bruce (International Computer Music Association, 1995-09)
      Presented is an application of genetic algorithms to the problem of composing music, in which GAs are used to produce a set of data filters that identify acceptable material from the output of a stochastic music generator. ...
    • Concurrency, Latency, or System Overhead: Which Has the Largest Impact on Uniprocessor DRAM-System Performance? 

      Cuppu, Vinodh; Jacob, Bruce (2001-06)
      Given a fixed CPU architecture and a fixed DRAM timing specification, there is still a large design space for a DRAM system organization. Parameters include the number of memory channels, the bandwidth of each channel, ...
    • DDR2 and Low Latency Variants 

      Davis, Brian; Mudge, Trevor; Jacob, Bruce; Cuppu, Vinodh (2000-07)
      This paper describes a performance examination of the DDR2 DRAM architecture and the proposed cache-enhanced variants. These preliminary studies are based upon ongoing collaboration between the authors and the Joint ...
    • DRAMsim: A Memory System Simulator 

      Wang, David; Ganesh, Brinda; Tuaycharoen, Nuengwong; Baynes, Kathleen; Jaleel, Aamer; Jacob, Bruce (ACM (Association for Computing Machinery) Publications, 2005-09)
      As memory accesses become slower with respect to the processor and consume more power with increasing memory size, the focus of memory performance and power consumption has become increasingly important. With the trend to ...
    • Extended Split-Issue: Enabling Flexibility in the Hardware Implementation of NUAL VLIW DSPs 

      Iyer, Bharath; Srinivasan, Sadagopan; Jacob, Bruce (2004-06)
      VLIW architecture based DSPs have become widespread due to the combined benefits of simple hardware and compiler-extracted instruction-level parallelism. However, the VLIW instruction set architecture and its hardware ...
    • Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling 

      Ganesh, Brinda; Jaleel, Aamer; Wang, David; Jacob, Bruce (2007-02)
      Performance gains in memory have traditionally been obtained by increasing memory bus widths and speeds. The diminishing returns of such techniques have led to the proposal of an alternate architecture, the Fully-Buffered ...
    • Hardware/Software Architectures for Real-Time Caching 

      Jacob, Bruce (1999-10)
      There are two fundamental problems in guaranteeing cache performance for real-time embedded systems: conflict and capacity misses. Though fully associative caches would solve conflict misses, they are too expensive to ...
    • Hardware/Software Co-Design of I/O Interfacing Hardware and Real-Time Device Drivers for Embedded Systems 

      Stewart, David B.; Jacob, Bruce (1999-06)
      We have conceptualized a hardware-software codesign strategy for creating I/O interfacing hardware and real-time operating system device drivers for microcontrollers, enabling hardware independent access to I/O devices ...
    • High-Performance DRAMs in Workstation Environments 

      Cuppu, Vinodh; Jacob, Bruce; Davis, Brian; Mudge, Trevor (2001-10)
      This paper presents a simulation-based performance study of several of the new high-performance DRAM architectures, each evaluated in a small system organization. These small-system organizations correspond to workstation-class ...
    • In-Line Interrupt Handling and Lock-Up Free Translation Lookaside Buffers (TLBs) 

      Jaleel, Aamer; Jacob, Bruce (2006-05)
      The effects of the general-purpose precise interrupt mechanisms in use for the past few decades have received very little attention. When modern out-of-order processors handle interrupts precisely, they typically begin by ...
    • Instruction-Level Power Dissipation in the Intel XScale Embedded Microprocessor 

      Varma, Ankush; Debes, Eric; Kozintsev, Igor; Jacob, Bruce (2005-01)
      We present an instruction-level power dissipation model of the Intel XScale R° microprocessor. The XScale implements the ARMTMISA, but uses an aggressive microarchitecture and a SIMD Wireless MMXTMco-processor to speed up ...
    • Last Level Cache (LLC) Performance of Data Mining Workloads On a CMP — Case Study of Parallel Bioinformatics Workloads 

      Jaleel, Aamer; Mattina, Matthew; Jacob, Bruce (2006-02)
      With the continuing growth in the amount of genetic data, members of the bioinformatics community are developing a variety of data-mining applications to understand the data and discover meaningful information. These ...
    • Looking to Parallel Algorithms for ILP and Decentralization 

      Berkovich, Efraim; Jacob, Bruce; Nuzman, Joseph; Vishkin, Uzi (1998-10-15)
      We introduce explicit multi-threading (XMT), a decentralized architecture that exploits fine-grained SPMD-style programming; a SPMD program can translate directly to MIPS assembly language using three additional instruction ...
    • Modeling Heterogeneous SoCs with SystemC: A Digital/MEMS Case Study 

      Varma, Ankush; Afridi, M. Yaqub; Akturk, Akin; Klein, Paul; Hefner, Allen R.; Jacob, Bruce (2006-10)
      Designers of SoCs with non-digital components, such as analog or MEMS devices, can currently use high-level system design languages, such as SystemC, to model only the digital parts of a system. This is a significant ...
    • Organizational Design Trade-Offs at the DRAM, Memory Bus, and Memory Controller Level: Initial Results 

      Cuppu, Vinodh; Jacob, Bruce (1999-11)
      This paper presents initial results in a study of organization level parameters associated with the design of the primary memory system—the DRAM system beneath the lowest level of the cache hierarchy. These parameters are ...